[PATCH] D81746: [AArch64] Fix BTI instruction emission.
Nick Desaulniers via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 15 09:13:37 PDT 2020
nickdesaulniers added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64BranchTargets.cpp:125
- // PACI[AB]SP are implicitly BTI JC, so no BTI instruction needed there.
- if (MBBI != MBB.end() && (MBBI->getOpcode() == AArch64::PACIASP ||
- MBBI->getOpcode() == AArch64::PACIBSP))
+ // SCTLR_EL1.BT[01] is set to 0 by default which means
+ // PACI[AB]SP are implicitly BTI C so no BTI C instruction is needed there.
----------------
chill wrote:
> chill wrote:
> > What if they are set to a different value?
> Sorry for commenting at this late stage, I didn't know that behavior was configurable.
> Shouldn't there be a test `isTargetAndroid()` and/or `isTargetLinux()` ?
At least for fixing the reported bug in Linux kernels, we shouldn't guard on `isTargetAndroid`; Linux kernels used in Android target aarch64-linux-gnu triples. (Apologies if I misunderstood your question, or if you knew that already).
Re: https://groups.google.com/g/clang-built-linux/c/t2cgw_2fA2w
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81746/new/
https://reviews.llvm.org/D81746
More information about the llvm-commits
mailing list