[PATCH] D80384: [SVE] Add flag to specify SVE register size, using this to calculate legal vector types.
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 15 06:28:55 PDT 2020
paulwalker-arm updated this revision to Diff 270729.
paulwalker-arm marked 2 inline comments as done.
paulwalker-arm added a comment.
Updated useSVEForFixedLengthVectors to reject vectors of illegal element types.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D80384/new/
https://reviews.llvm.org/D80384
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
llvm/test/Analysis/CostModel/AArch64/sve-fixed-length.ll
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