[PATCH] D81537: [PowerPC] Support constrained fp operation for scalar fptosi/fptoui

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:8145
+static SDValue getFPNode(unsigned Opc, EVT VT, SDValue Op, SDValue Chain,
+                         SelectionDAG &DAG, bool Strict) {
+  SDLoc dl(Op);
----------------
The Strict parameter is not needed as you can check the value of the Chain to know it.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:8174
   SDLoc dl(Op);
-  bool Signed = Op.getOpcode() == ISD::FP_TO_SINT;
-  SDValue Src = Op.getOperand(0);
+  bool Strict = Op->isStrictFPOpcode();
+  bool Signed = Op.getOpcode() == ISD::FP_TO_SINT ||
----------------
IsStrict, IsSigned


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:3278
           (i64 (MFVSRD $S))>;
+def : Pat<(i64 (PPCstrict_mfvsr f64:$A)),
+          (i64 (MFVSRD f64:$A))>;
----------------
Please move them into some group has the semantics of truncating. It is not bitconvert.


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  https://reviews.llvm.org/D81537/new/

https://reviews.llvm.org/D81537