[PATCH] D81547: [X86][SSE] LowerVectorAllZeroTest - handle OR vector reductions
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 14 13:52:42 PDT 2020
RKSimon updated this revision to Diff 270637.
RKSimon retitled this revision from "[X86][SSE] combineVectorSizedSetCCEquality - handle OR vector reductions" to "[X86][SSE] LowerVectorAllZeroTest - handle OR vector reductions".
RKSimon edited the summary of this revision.
RKSimon added a comment.
Refreshed the patch to be based off LowerVectorAllZeroTest instead of combineVectorSizedSetCCEquality, which already handles scalar reductions and with a suitable refactor can handle vector reductions as well.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81547/new/
https://reviews.llvm.org/D81547
Files:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/pr45378.ll
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