[PATCH] D81780: AMDGPU/AMDHSA: Implement new target ID support in AMDGPU backend
Konstantin Zhuravlyov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 12 18:48:38 PDT 2020
kzhuravl created this revision.
kzhuravl added reviewers: yaxunl, t-tye, scott.linder.
Herald added subscribers: kerbowa, rupprecht, MaskRay, hiraditya, tpr, dstuttard, nhaehnle, wdng, jvesely, arsenm.
Herald added a reviewer: jhenderson.
Herald added a project: LLVM.
kzhuravl added a reviewer: kerbowa.
kzhuravl added a parent revision: D80750: llvm-link: Add module flag behavior MergeTargetId.
kzhuravl added a comment.
Changes to AMDGPUUsage are WIP.
Target ID format is a list of strings delimited by ':', e.g.
amdgcn-amd-amdhsa--gfx908:xnack+:sramecc-. The first string
is an id string which could be triple-cpu but may not be
necessarily so. The other strings are called feature string
which may or may not be target features. Except for the id
string, all feature strings end with '+' or '-'.
- Add --amdgcn-new-target-id option that enables new
target ID in the backend (off by default)
- ELF Header changes
- Per code object features are now recorded in e_flags
- xnack, values: default, off, on
- EF_AMDGPU_FEATURE_XNACK (mask)
- EF_AMDGPU_FEATURE_XNACK_DEFAULT (1)
- EF_AMDGPU_FEATURE_XNACK_OFF (2)
- EF_AMDGPU_FEATURE_XNACK_ON (3)
- sramecc, values: default, off, on
- EF_AMDGPU_FEATURE_SRAMECC (mask)
- EF_AMDGPU_FEATURE_SRAMECC_DEFAULT (1)
- EF_AMDGPU_FEATURE_SRAMECC_OFF (2)
- EF_AMDGPU_FEATURE_SRAMECC_ON (3)
- e_ident[EI_ABIVERSION] is bumped up to 2
- Metadata
- Add root metadata with key "amdhsa.target" and value
being new target id
- Assembler
- Parse and emit new target id
- Tools
- Relevant update to elf tools
https://reviews.llvm.org/D81780
Files:
llvm/docs/AMDGPUUsage.rst
llvm/include/llvm/BinaryFormat/ELF.h
llvm/lib/ObjectYAML/ELFYAML.cpp
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
llvm/test/CodeGen/AMDGPU/tid-incompatible-sti-1.ll
llvm/test/CodeGen/AMDGPU/tid-incompatible-sti-2.ll
llvm/test/CodeGen/AMDGPU/tid-none.ll
llvm/test/CodeGen/AMDGPU/tid-xnack-default-sramecc-default.ll
llvm/test/CodeGen/AMDGPU/tid-xnack-default-sramecc-off.ll
llvm/test/CodeGen/AMDGPU/tid-xnack-default-sramecc-on.ll
llvm/test/CodeGen/AMDGPU/tid-xnack-off-sramecc-default.ll
llvm/test/CodeGen/AMDGPU/tid-xnack-off-sramecc-off.ll
llvm/test/CodeGen/AMDGPU/tid-xnack-off-sramecc-on.ll
llvm/test/CodeGen/AMDGPU/tid-xnack-on-sramecc-default.ll
llvm/test/CodeGen/AMDGPU/tid-xnack-on-sramecc-off.ll
llvm/test/CodeGen/AMDGPU/tid-xnack-on-sramecc-on.ll
llvm/test/MC/AMDGPU/tid-incompatible-sti-1.s
llvm/test/MC/AMDGPU/tid-incompatible-sti-2.s
llvm/test/MC/AMDGPU/tid-none.s
llvm/test/MC/AMDGPU/tid-xnack-default-sramecc-default.s
llvm/test/MC/AMDGPU/tid-xnack-default-sramecc-off.s
llvm/test/MC/AMDGPU/tid-xnack-default-sramecc-on.s
llvm/test/MC/AMDGPU/tid-xnack-off-sramecc-default.s
llvm/test/MC/AMDGPU/tid-xnack-off-sramecc-off.s
llvm/test/MC/AMDGPU/tid-xnack-off-sramecc-on.s
llvm/test/MC/AMDGPU/tid-xnack-on-sramecc-default.s
llvm/test/MC/AMDGPU/tid-xnack-on-sramecc-off.s
llvm/test/MC/AMDGPU/tid-xnack-on-sramecc-on.s
llvm/tools/llvm-readobj/ELFDumper.cpp
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