[PATCH] D81711: [SDAG] Add new AssertAlign ISD node.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 11 23:25:45 PDT 2020
craig.topper added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:3175
+ Known.Zero.setLowBits(LogOfAlign);
+ Known.One.clearLowBits(LogOfAlign);
+ break;
----------------
Known.One should already be all 0s. I don't think you need to clear it. Though maybe you should call computeKnownBits to propagate from the input? Then you would need to clear it.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81711/new/
https://reviews.llvm.org/D81711
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