[PATCH] D81587: [GlobalISel] Add missing properties to G_BRINDIRECT, G_BRJT

[Daniel Sanders via Phabricator via llvm-commits]

dsanders added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/legalize-blockaddress.mir:28
   ; CHECK: bb.0 (%ir-block.0):
-  ; CHECK:   successors: %bb.1(0x80000000)
   ; CHECK:   [[BLOCK_ADDR:%[0-9]+]]:_(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block)
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I feel that this should probably become `successors: deref(%123)(0x80000000)` or something along those lines but that's not an issue for this patch. It's more of a potential improvement to MIR itself


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Comment at: llvm/test/MachineVerifier/test_g_brindirect_is_indirect_branch.mir:17
+
+    ; CHECK-LABEL: test_indirect_branch
+    G_BRINDIRECT %0
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Most of the verifier tests are checking for specific messages output by the verifier. Is it possible to do that for these two tests too? For this one, I'm thinking maybe it could test for an isBranch() and !isIndirectBranch() that doesn't have any operands that directly reference basic blocks. It would then report that isIndirectBranch() is missing for instructions like that. That would also cover target-specific indirect branch instructions that forget isIndirectBranch() too


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D81587/new/

https://reviews.llvm.org/D81587