[PATCH] D81548: [X86][AVX512] Avoid bitcasts between scalar and vXi1 bool vectors
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 10 10:32:25 PDT 2020
craig.topper added inline comments.
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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:37953
+ case ISD::SHL: {
+ // If we find a suitable source, a SHL becomes a KSHIFTR (little endian).
+ SDValue Src0 = V.getOperand(0);
----------------
Why does a SHL become KSHIFTR?
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Comment at: llvm/test/CodeGen/X86/vector-shuffle-v1.ll:893
+; AVX512F-NEXT: kshiftrw $8, %k0, %k0
+; AVX512F-NEXT: kshiftrw $8, %k0, %k1
+; AVX512F-NEXT: korw %k0, %k1, %k1
----------------
Isn't k1 zero after this kshiftr? The two kshiftrs back to back add up to 16. So there are no bits left.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81548/new/
https://reviews.llvm.org/D81548
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