[PATCH] D81523: AMDGPU/GlobalISel: Workaround some load/store type selection patterns

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: kerbowa, foad, nhaehnle.
Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

The logic is written for what loads/stores should be selectable. There
are a set of cases that should be selectable, but due to missing MVTs
and/or selection patterns, will fail to select. I think eventually
load/store select patterns should ignore the type and only look at the
value size, but until that happens, bitcast these to equivalent i32
vectors.


https://reviews.llvm.org/D81523

Files:
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.s96.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/no-legalize-atomic.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir