[PATCH] D81511: [AArch64][SVE] Add legalization support for i32/i64 vector srem/urem

[Eli Friedman via Phabricator via llvm-commits]

efriedma created this revision.
efriedma added reviewers: sdesmalen, dmgreen, kmclaughlin, c-rhodes.
Herald added subscribers: danielkiss, kerbowa, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett, nhaehnle, jvesely, arsenm.
Herald added a project: LLVM.
efriedma added a reviewer: RKSimon.

Implement them on top of sdiv/udiv, similar to what we do for integer types.

Potential future work: implementing i8/i16 srem/urem, optimizations for constant divisors, optimizing the mul+sub to mls.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D81511

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/AArch64/llvm-ir-to-intrinsic.ll

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