[PATCH] D81257: [AArch64] Allow BTI mnemonics in the HINT space with BTI disabled

[Daniel Kiss via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG7a38618a2059: [AArch64] Allow BTI mnemonics in the HINT space with BTI disabled (authored by danielkiss).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81257/new/

https://reviews.llvm.org/D81257

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/MC/AArch64/armv8.5a-bti.s


Index: llvm/test/MC/AArch64/armv8.5a-bti.s
===================================================================
--- llvm/test/MC/AArch64/armv8.5a-bti.s
+++ llvm/test/MC/AArch64/armv8.5a-bti.s
@@ -1,6 +1,6 @@
-// RUN:     llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+bti   < %s      | FileCheck %s
-// RUN:     llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.5a < %s      | FileCheck %s
-// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-bti   < %s 2>&1 | FileCheck %s --check-prefix=NOBTI
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+bti   < %s | FileCheck %s
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.5a < %s | FileCheck %s
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-bti   < %s | FileCheck %s --check-prefix=NOBTI
 
 bti
 bti c
@@ -12,14 +12,10 @@
 // CHECK: bti j    // encoding: [0x9f,0x24,0x03,0xd5]
 // CHECK: bti jc   // encoding: [0xdf,0x24,0x03,0xd5]
 
-// NOBTI:      instruction requires: bti
-// NOBTI-NEXT: bti
-// NOBTI:      instruction requires: bti
-// NOBTI-NEXT: bti
-// NOBTI:      instruction requires: bti
-// NOBTI-NEXT: bti
-// NOBTI:      instruction requires: bti
-// NOBTI-NEXT: bti
+// NOBTI: hint #32 // encoding: [0x1f,0x24,0x03,0xd5]
+// NOBTI: hint #34 // encoding: [0x5f,0x24,0x03,0xd5]
+// NOBTI: hint #36 // encoding: [0x9f,0x24,0x03,0xd5]
+// NOBTI: hint #38 // encoding: [0xdf,0x24,0x03,0xd5]
 
 hint #32
 hint #34
Index: llvm/lib/Target/AArch64/AArch64InstrInfo.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -726,6 +726,12 @@
 def : InstAlias<"dgh",  (HINT 0b110)>;
 def : InstAlias<"esb",  (HINT 0b10000)>, Requires<[HasRAS]>;
 def : InstAlias<"csdb", (HINT 20)>;
+// In order to be able to write readable assembly, LLVM should accept assembly
+// inputs that use Branch Target Indentification mnemonics, even with BTI disabled.
+// However, in order to be compatible with other assemblers (e.g. GAS), LLVM
+// should not emit these mnemonics unless BTI is enabled.
+def : InstAlias<"bti",  (HINT 32), 0>;
+def : InstAlias<"bti $op", (HINT btihint_op:$op), 0>;
 def : InstAlias<"bti",  (HINT 32)>, Requires<[HasBTI]>;
 def : InstAlias<"bti $op", (HINT btihint_op:$op)>, Requires<[HasBTI]>;
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D81257.269608.patch
Type: text/x-patch
Size: 2397 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200609/7033a55b/attachment.bin>