[PATCH] D81182: [AArch64][GlobalISel] Select trn1 and trn2
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 9 11:00:10 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rGcb2d8b30ad0d: [AArch64][GlobalISel] Select trn1 and trn2 (authored by paquette).
Changed prior to commit:
https://reviews.llvm.org/D81182?vs=268550&id=269607#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81182/new/
https://reviews.llvm.org/D81182
Files:
llvm/lib/Target/AArch64/AArch64Combine.td
llvm/lib/Target/AArch64/AArch64InstrGISel.td
llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-trn.mir
llvm/test/CodeGen/AArch64/GlobalISel/select-trn.mir
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