[PATCH] D81411: [ARM][BFloat] Lowering of create/get/set/dup intrinsics
Mikhail Maltsev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 9 04:54:06 PDT 2020
miyuki marked an inline comment as done.
miyuki added inline comments.
================
Comment at: llvm/lib/Target/ARM/ARMInstrNEON.td:6501
+ (DSubReg_i16_reg imm:$lane))),
+ (VMOVRH $src2), (SubReg_i16_lane imm:$lane))),
+ (DSubReg_i16_reg imm:$lane)))>;
----------------
dmgreen wrote:
> Does VMOVRH require fullfp16? Am I right in saying that bfloat doesn't require the set of instructions we put into HasFPRegs16? That sounds like a pain.
VMOVRH requires HasFPRegs16 and VMOVH requires HasFullFP16. But you are right, both instructions require the same extension in ARMARM (HaveFP16Ext), and the HaveAArch32BF16Ext extension is a separate thing. We need separate patterns for cases when BF16 is enabled but FP16 is not.
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https://reviews.llvm.org/D81411/new/
https://reviews.llvm.org/D81411
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