[PATCH] D81430: [AMDGPU] Custom lowering of i64 umulo/smulo

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In D81430#2081054 <https://reviews.llvm.org/D81430#2081054>, @arsenm wrote:

> Can you also add cases with power of 2 constants that the default expansion handles? I assume we miss out on these as-is?
>
>   // mulo(X, 1 << S) -> { X << S, (X << S) >> S != X }


That is questionably if we are missing something here with umulo, we probably missing quite a bit with smulo. The main difference is the avoidance of 64 bit shifts we do after such lowering.



================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:5008
+                            SL, VT, LHS, RHS);
+
+  SDValue Sign = isSigned
----------------
arsenm wrote:
> I assume this is extracted from the default expansion?
Right. A little simplified for what is legal for us, otherwise it is a default implementation.


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