[llvm] 80ab934 - [AArch64] Add combine-load test; NFC

[Shawn Landden via llvm-commits]

Author: Shawn Landden
Date: 2020-06-08T14:24:27+04:00
New Revision: 80ab9345ed976327210d48da33bab33a79b79629

URL: https://github.com/llvm/llvm-project/commit/80ab9345ed976327210d48da33bab33a79b79629
DIFF: https://github.com/llvm/llvm-project/commit/80ab9345ed976327210d48da33bab33a79b79629.diff

LOG: [AArch64] Add combine-load test; NFC

Problem discovered in https://reviews.llvm.org/D81343

Added: 
    llvm/test/CodeGen/AArch64/combine-loads.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/combine-loads.ll b/llvm/test/CodeGen/AArch64/combine-loads.ll
new file mode 100644
index 000000000000..fc0b921b0b3a
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/combine-loads.ll
@@ -0,0 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -O0 -mtriple=aarch64-unknown-unknown | FileCheck %s
+
+define <2 x i64> @z(i64* nocapture nonnull readonly %p) {
+; CHECK-LABEL: z:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov x8, xzr
+; CHECK-NEXT:    // implicit-def: $q0
+; CHECK-NEXT:    fmov d0, x8
+; CHECK-NEXT:    mov v0.d[1], x8
+; CHECK-NEXT:    ldr x8, [x0]
+; CHECK-NEXT:    ldr x9, [x0, #8]
+; CHECK-NEXT:    mov v0.d[0], x8
+; CHECK-NEXT:    mov v0.d[1], x9
+; CHECK-NEXT:    ret
+  %b = load i64, i64* %p
+  %p2 = getelementptr i64, i64* %p, i64 1
+  %bb = load i64, i64* %p2
+  %r1 = insertelement <2 x i64> zeroinitializer, i64 %b, i32 0
+  %r2 = insertelement <2 x i64> %r1, i64 %bb, i32 1
+  ret <2 x i64> %r2
+}