[PATCH] D81370: [VE] Support control instructions in MC layer

[Kazushi Marukawa via Phabricator via llvm-commits]

kaz7 created this revision.
kaz7 added reviewers: simoll, k-ishizaka.
kaz7 added projects: LLVM, VE.
Herald added subscribers: llvm-commits, hiraditya.

Add regression tests of asmparser, mccodeemitter, and disassembler for
control instructions.  Add not defined LPM/SPM/LFR/SFR/SMIR/NOP/LCR/
SCR/TSCR/FIDCR control isntructions newly.  Define MISC registers which
SMIR instruction reads and IC register which SIC instruction reads.
Change asmparser to support Zero, UImm3, and UImm6 operands and MISC
registers.  Change instprinter to support MISC registers also.
Change to use auto to receive dyn_cast also.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D81370

Files:
  llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
  llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
  llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
  llvm/lib/Target/VE/VEInstrInfo.td
  llvm/lib/Target/VE/VERegisterInfo.td
  llvm/test/MC/VE/FIDCR.s
  llvm/test/MC/VE/LCR.s
  llvm/test/MC/VE/LFRSFR.s
  llvm/test/MC/VE/LPMSPM.s
  llvm/test/MC/VE/MONC.s
  llvm/test/MC/VE/NOP.s
  llvm/test/MC/VE/SCR.s
  llvm/test/MC/VE/SIC.s
  llvm/test/MC/VE/SMIR.s
  llvm/test/MC/VE/TSCR.s

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