[PATCH] D66004: [WIP][X86][SSE] SimplifyDemandedVectorEltsForTargetNode - add general shuffle combining support

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In D66004#2078352 <https://reviews.llvm.org/D66004#2078352>, @xbolva00 wrote:

> Status of this patch?


I'm still looking at this - it both affects and is affected by so much code its a yak shaving nightmare to handle it all.

The big remaining issue is the loss of INSERTPS for some BUILDVECTOR patterns, which means we lose load folding on SSE41+ targets.

Additionally, we need to stop creating nodes on the fly inside combineX86ShufflesRecursively (see PR45974) as this screws up hasOneUse checks which are often vital in SimplifyDemandedBits/SimplifyDemandedVectorElts.


Repository:
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https://reviews.llvm.org/D66004