[PATCH] D81307: [X86] Return 0 from TTI getNumberOfRegisters and getRegisterBitWidth on SSE1 only targets

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

Ideally getRegisterBitWidth/getNumberOfRegisters would distinguish between (legal) integer/float/double types more.

Have you made any progress on the SVML v4f64 SSE2 issue? I'm just wondering if that would avoid us needing to kill SSE1 vectorization entirely (although I realise its not a high priority target these days).


Repository:
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  https://reviews.llvm.org/D81307/new/

https://reviews.llvm.org/D81307