[PATCH] D81324: [VE] Support shift operation instructions in MC layer
    Kazushi Marukawa via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Fri Jun  5 18:59:40 PDT 2020
    
    
  
kaz7 created this revision.
kaz7 added reviewers: simoll, k-ishizaka.
kaz7 added projects: LLVM, VE.
Herald added subscribers: llvm-commits, hiraditya.
Add regression tests of asmparser, mccodeemitter, and disassembler for
shift operation instructions. Also change asmparser to support UImm7
operand. And, add new SLD/SRD/SLA isntructions also.
Repository:
  rG LLVM Github Monorepo
https://reviews.llvm.org/D81324
Files:
  llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
  llvm/lib/Target/VE/VEInstrInfo.td
  llvm/test/MC/VE/SLA.s
  llvm/test/MC/VE/SLD.s
  llvm/test/MC/VE/SLL.s
  llvm/test/MC/VE/SRA.s
  llvm/test/MC/VE/SRD.s
  llvm/test/MC/VE/SRL.s
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D81324.268983.patch
Type: text/x-patch
Size: 11859 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200606/2b953ce0/attachment.bin>
    
    
More information about the llvm-commits
mailing list