[PATCH] D81275: [AMDGPU] Move default initialization of M0 register after the instruction selection

Valery Pykhtin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 5 10:01:57 PDT 2020


vpykhtin created this revision.
vpykhtin added reviewers: arsenm, rampitec, tstellar.
Herald added subscribers: llvm-commits, kerbowa, jfb, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

This allows to avoid problems with glue on extraction of lo16 bit of DS_READ. Note there is a small improvement in ds groupping on pre-gfx9.

There are some cleanup left, its better to made it in separate patch.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D81275

Files:
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/lib/Target/AMDGPU/DSInstructions.td
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/test/CodeGen/AMDGPU/ds_read2.ll
  llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll

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