[llvm] 9bcef27 - Revert "[CodeGen][SVE] Calculate correct type legalization for scalable vectors."
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 5 08:04:44 PDT 2020
Author: Sander de Smalen
Date: 2020-06-05T16:03:52+01:00
New Revision: 9bcef270d7a319c6c0fdffc6c80984a8f0a30ecb
URL: https://github.com/llvm/llvm-project/commit/9bcef270d7a319c6c0fdffc6c80984a8f0a30ecb
DIFF: https://github.com/llvm/llvm-project/commit/9bcef270d7a319c6c0fdffc6c80984a8f0a30ecb.diff
LOG: Revert "[CodeGen][SVE] Calculate correct type legalization for scalable vectors."
Seems to break some buildbots, reverting the patch for now.
This reverts commit 164f4b9d26fdf3cd640a09b63b5ec44d033cbe8a.
Added:
Modified:
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/include/llvm/Support/TypeSize.h
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/lib/CodeGen/TargetLoweringBase.cpp
llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index b3c3bcadc4cd..05770163cab4 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -210,13 +210,6 @@ class TargetLoweringBase {
TypeWidenVector, // This vector should be widened into a larger vector.
TypePromoteFloat, // Replace this float with a larger one.
TypeSoftPromoteHalf, // Soften half to i16 and use float to do arithmetic.
- TypeScalarizeScalableVector, // This action is explicitly left unimplemented.
- // While it is theoretically possible to
- // legalize operations on scalable types with a
- // loop that handles the vscale * #lanes of the
- // vector, this is non-trivial at SelectionDAG
- // level and these types are better to be
- // widened or promoted.
};
/// LegalizeKind holds the legalization kind that needs to happen to EVT
@@ -419,7 +412,7 @@ class TargetLoweringBase {
virtual TargetLoweringBase::LegalizeTypeAction
getPreferredVectorAction(MVT VT) const {
// The default action for one element vectors is to scalarize
- if (VT.getVectorElementCount() == 1)
+ if (VT.getVectorNumElements() == 1)
return TypeScalarizeVector;
// The default action for an odd-width vector is to widen.
if (!VT.isPow2VectorType())
diff --git a/llvm/include/llvm/Support/TypeSize.h b/llvm/include/llvm/Support/TypeSize.h
index 05295f40049f..b4c869fcb9e4 100644
--- a/llvm/include/llvm/Support/TypeSize.h
+++ b/llvm/include/llvm/Support/TypeSize.h
@@ -15,7 +15,6 @@
#ifndef LLVM_SUPPORT_TYPESIZE_H
#define LLVM_SUPPORT_TYPESIZE_H
-#include "llvm/Support/MathExtras.h"
#include "llvm/Support/WithColor.h"
#include <cstdint>
@@ -50,12 +49,6 @@ class ElementCount {
bool operator!=(const ElementCount& RHS) const {
return !(*this == RHS);
}
- bool operator==(unsigned RHS) const { return Min == RHS && !Scalable; }
- bool operator!=(unsigned RHS) const { return !(*this == RHS); }
-
- ElementCount NextPowerOf2() const {
- return ElementCount(llvm::NextPowerOf2(Min), Scalable);
- }
};
// This class is used to represent the size of types. If the type is of fixed
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 873812d074d9..70ef59338375 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -344,8 +344,6 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
BitConvertToInteger(GetScalarizedVector(InOp)));
break;
- case TargetLowering::TypeScalarizeScalableVector:
- report_fatal_error("Scalarization of scalable vectors is not supported.");
case TargetLowering::TypeSplitVector: {
if (!NOutVT.isVector()) {
// For example, i32 = BITCAST v2i16 on alpha. Convert the split
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
index 9885110d64f9..484f62668838 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
@@ -245,9 +245,6 @@ bool DAGTypeLegalizer::run() {
case TargetLowering::TypeLegal:
LLVM_DEBUG(dbgs() << "Legal result type\n");
break;
- case TargetLowering::TypeScalarizeScalableVector:
- report_fatal_error(
- "Scalarization of scalable vectors is not supported.");
// The following calls must take care of *all* of the node's results,
// not just the illegal result they were passed (this includes results
// with a legal type). Results can be remapped using ReplaceValueWith,
@@ -310,9 +307,6 @@ bool DAGTypeLegalizer::run() {
case TargetLowering::TypeLegal:
LLVM_DEBUG(dbgs() << "Legal operand\n");
continue;
- case TargetLowering::TypeScalarizeScalableVector:
- report_fatal_error(
- "Scalarization of scalable vectors is not supported.");
// The following calls must either replace all of the node's results
// using ReplaceValueWith, and return "false"; or update the node's
// operands in place, and return "true".
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
index 666f128a4cc2..3c1f8e61b531 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
@@ -83,8 +83,6 @@ void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
return;
- case TargetLowering::TypeScalarizeScalableVector:
- report_fatal_error("Scalarization of scalable vectors is not supported.");
case TargetLowering::TypeWidenVector: {
assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST");
InOp = GetWidenedVector(InOp);
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index 9ebf4ea9637c..ff2c8d3a8db2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -1063,8 +1063,6 @@ void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
return;
- case TargetLowering::TypeScalarizeScalableVector:
- report_fatal_error("Scalarization of scalable vectors is not supported.");
}
// In the general case, convert the input to an integer and split it by hand.
@@ -3467,8 +3465,6 @@ SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
switch (getTypeAction(InVT)) {
case TargetLowering::TypeLegal:
break;
- case TargetLowering::TypeScalarizeScalableVector:
- report_fatal_error("Scalarization of scalable vectors is not supported.");
case TargetLowering::TypePromoteInteger: {
// If the incoming type is a vector that is being promoted, then
// we know that the elements are arranged
diff erently and that we
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 4a304ae99653..3c8fc5a7e05b 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -823,7 +823,9 @@ TargetLoweringBase::getTypeConversion(LLVMContext &Context, EVT VT) const {
"Promote may not follow Expand or Promote");
if (LA == TypeSplitVector)
- return LegalizeKind(LA, SVT.getHalfNumVectorElementsVT());
+ return LegalizeKind(LA,
+ EVT::getVectorVT(Context, SVT.getVectorElementType(),
+ SVT.getVectorNumElements() / 2));
if (LA == TypeScalarizeVector)
return LegalizeKind(LA, SVT.getVectorElementType());
return LegalizeKind(LA, NVT);
@@ -850,16 +852,13 @@ TargetLoweringBase::getTypeConversion(LLVMContext &Context, EVT VT) const {
}
// Handle vector types.
- ElementCount NumElts = VT.getVectorElementCount();
+ unsigned NumElts = VT.getVectorNumElements();
EVT EltVT = VT.getVectorElementType();
// Vectors with only one element are always scalarized.
if (NumElts == 1)
return LegalizeKind(TypeScalarizeVector, EltVT);
- if (VT.getVectorElementCount() == ElementCount(1, true))
- report_fatal_error("Cannot legalize this vector");
-
// Try to widen vector elements until the element type is a power of two and
// promote it to a legal type later on, for example:
// <3 x i8> -> <4 x i8> -> <4 x i32>
@@ -867,7 +866,7 @@ TargetLoweringBase::getTypeConversion(LLVMContext &Context, EVT VT) const {
// Vectors with a number of elements that is not a power of two are always
// widened, for example <3 x i8> -> <4 x i8>.
if (!VT.isPow2VectorType()) {
- NumElts = NumElts.NextPowerOf2();
+ NumElts = (unsigned)NextPowerOf2(NumElts);
EVT NVT = EVT::getVectorVT(Context, EltVT, NumElts);
return LegalizeKind(TypeWidenVector, NVT);
}
@@ -916,7 +915,7 @@ TargetLoweringBase::getTypeConversion(LLVMContext &Context, EVT VT) const {
// If there is no wider legal type, split the vector.
while (true) {
// Round up to the next power of 2.
- NumElts = NumElts.NextPowerOf2();
+ NumElts = (unsigned)NextPowerOf2(NumElts);
// If there is no simple vector type with this many elements then there
// cannot be a larger legal vector type. Note that this assumes that
@@ -939,7 +938,7 @@ TargetLoweringBase::getTypeConversion(LLVMContext &Context, EVT VT) const {
}
// Vectors with illegal element types are expanded.
- EVT NVT = EVT::getVectorVT(Context, EltVT, VT.getVectorElementCount() / 2);
+ EVT NVT = EVT::getVectorVT(Context, EltVT, VT.getVectorNumElements() / 2);
return LegalizeKind(TypeSplitVector, NVT);
}
@@ -1258,7 +1257,7 @@ void TargetLoweringBase::computeRegisterProperties(
continue;
MVT EltVT = VT.getVectorElementType();
- ElementCount EC = VT.getVectorElementCount();
+ unsigned NElts = VT.getVectorNumElements();
bool IsLegalWiderType = false;
bool IsScalable = VT.isScalableVector();
LegalizeTypeAction PreferredAction = getPreferredVectorAction(VT);
@@ -1275,7 +1274,8 @@ void TargetLoweringBase::computeRegisterProperties(
// Promote vectors of integers to vectors with the same number
// of elements, with a wider element type.
if (SVT.getScalarSizeInBits() > EltVT.getSizeInBits() &&
- SVT.getVectorElementCount() == EC && isTypeLegal(SVT)) {
+ SVT.getVectorNumElements() == NElts &&
+ SVT.isScalableVector() == IsScalable && isTypeLegal(SVT)) {
TransformToType[i] = SVT;
RegisterTypeForVT[i] = SVT;
NumRegistersForVT[i] = 1;
@@ -1290,13 +1290,13 @@ void TargetLoweringBase::computeRegisterProperties(
}
case TypeWidenVector:
- if (isPowerOf2_32(EC.Min)) {
+ if (isPowerOf2_32(NElts)) {
// Try to widen the vector.
for (unsigned nVT = i + 1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
MVT SVT = (MVT::SimpleValueType) nVT;
- if (SVT.getVectorElementType() == EltVT &&
- SVT.isScalableVector() == IsScalable &&
- SVT.getVectorElementCount().Min > EC.Min && isTypeLegal(SVT)) {
+ if (SVT.getVectorElementType() == EltVT
+ && SVT.getVectorNumElements() > NElts
+ && SVT.isScalableVector() == IsScalable && isTypeLegal(SVT)) {
TransformToType[i] = SVT;
RegisterTypeForVT[i] = SVT;
NumRegistersForVT[i] = 1;
@@ -1340,12 +1340,10 @@ void TargetLoweringBase::computeRegisterProperties(
ValueTypeActions.setTypeAction(VT, TypeScalarizeVector);
else if (PreferredAction == TypeSplitVector)
ValueTypeActions.setTypeAction(VT, TypeSplitVector);
- else if (EC.Min > 1)
- ValueTypeActions.setTypeAction(VT, TypeSplitVector);
else
- ValueTypeActions.setTypeAction(VT, EC.Scalable
- ? TypeScalarizeScalableVector
- : TypeScalarizeVector);
+ // Set type action according to the number of elements.
+ ValueTypeActions.setTypeAction(VT, NElts == 1 ? TypeScalarizeVector
+ : TypeSplitVector);
} else {
TransformToType[i] = NVT;
ValueTypeActions.setTypeAction(VT, TypeWidenVector);
diff --git a/llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp b/llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
index 42d47faa1003..848cbc079002 100644
--- a/llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
+++ b/llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
@@ -17,7 +17,9 @@
#include "llvm/Target/TargetMachine.h"
#include "gtest/gtest.h"
-namespace llvm {
+using namespace llvm;
+
+namespace {
class AArch64SelectionDAGTest : public testing::Test {
protected:
@@ -39,8 +41,8 @@ class AArch64SelectionDAGTest : public testing::Test {
return;
TargetOptions Options;
- TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>(
- T->createTargetMachine("AArch64", "", "+sve", Options, None, None,
+ TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
+ T->createTargetMachine("AArch64", "", "", Options, None, None,
CodeGenOpt::Aggressive)));
if (!TM)
return;
@@ -67,14 +69,6 @@ class AArch64SelectionDAGTest : public testing::Test {
DAG->init(*MF, ORE, nullptr, nullptr, nullptr, nullptr, nullptr);
}
- TargetLoweringBase::LegalizeTypeAction getTypeAction(EVT VT) {
- return DAG->getTargetLoweringInfo().getTypeAction(Context, VT);
- }
-
- EVT getTypeToTransformTo(EVT VT) {
- return DAG->getTargetLoweringInfo().getTypeToTransformTo(Context, VT);
- }
-
LLVMContext Context;
std::unique_ptr<LLVMTargetMachine> TM;
std::unique_ptr<Module> M;
@@ -383,59 +377,4 @@ TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Scalable_ADD_of_SPLAT_VECTO
EXPECT_EQ(SplatIdx, 0);
}
-TEST_F(AArch64SelectionDAGTest, getTypeConversion_SplitScalableMVT) {
- if (!TM)
- return;
-
- MVT VT = MVT::nxv4i64;
- EXPECT_EQ(getTypeAction(VT), TargetLoweringBase::TypeSplitVector);
- ASSERT_TRUE(getTypeToTransformTo(VT).isScalableVector());
-}
-
-TEST_F(AArch64SelectionDAGTest, getTypeConversion_PromoteScalableMVT) {
- if (!TM)
- return;
-
- MVT VT = MVT::nxv2i32;
- EXPECT_EQ(getTypeAction(VT), TargetLoweringBase::TypePromoteInteger);
- ASSERT_TRUE(getTypeToTransformTo(VT).isScalableVector());
-}
-
-TEST_F(AArch64SelectionDAGTest, getTypeConversion_NoScalarizeMVT_nxv1f32) {
- if (!TM)
- return;
-
- MVT VT = MVT::nxv1f32;
- EXPECT_NE(getTypeAction(VT), TargetLoweringBase::TypeScalarizeVector);
- ASSERT_TRUE(getTypeToTransformTo(VT).isScalableVector());
-}
-
-TEST_F(AArch64SelectionDAGTest, getTypeConversion_SplitScalableEVT) {
- if (!TM)
- return;
-
- EVT VT = EVT::getVectorVT(Context, MVT::i64, 256, true);
- EXPECT_EQ(getTypeAction(VT), TargetLoweringBase::TypeSplitVector);
- EXPECT_EQ(getTypeToTransformTo(VT), VT.getHalfNumVectorElementsVT(Context));
-}
-
-TEST_F(AArch64SelectionDAGTest, getTypeConversion_WidenScalableEVT) {
- if (!TM)
- return;
-
- EVT FromVT = EVT::getVectorVT(Context, MVT::i64, 6, true);
- EVT ToVT = EVT::getVectorVT(Context, MVT::i64, 8, true);
-
- EXPECT_EQ(getTypeAction(FromVT), TargetLoweringBase::TypeWidenVector);
- EXPECT_EQ(getTypeToTransformTo(FromVT), ToVT);
-}
-
-TEST_F(AArch64SelectionDAGTest, getTypeConversion_NoScalarizeEVT_nxv1f128) {
- if (!TM)
- return;
-
- EVT FromVT = EVT::getVectorVT(Context, MVT::f128, 1, true);
- EXPECT_DEATH(getTypeAction(FromVT), "Cannot legalize this vector");
-}
-
-} // end namespace llvm
+} // end anonymous namespace
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