[PATCH] D81247: Fix a typo in AMDGPU docs

[Madhur Amilkanthwar via Phabricator via llvm-commits]

madhur13490 created this revision.
madhur13490 added reviewers: t-tye, arsenm.
Herald added subscribers: llvm-commits, kerbowa, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D81247

Files:
  llvm/docs/AMDGPUUsage.rst


Index: llvm/docs/AMDGPUUsage.rst
===================================================================
--- llvm/docs/AMDGPUUsage.rst
+++ llvm/docs/AMDGPUUsage.rst
@@ -3851,7 +3851,7 @@
 4. The VGPRs are set by SPI which only supports specifying either (X), (X, Y)
    or (X, Y, Z).
 
-Flat Scratch register pair are adjacent SGRRs so they can be moved as a 64-bit
+Flat Scratch register pair are adjacent SGPRs so they can be moved as a 64-bit
 value to the hardware required SGPRn-3 and SGPRn-4 respectively.
 
 The global segment can be accessed either using buffer instructions (GFX6 which


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