[PATCH] D81181: [TargetLowering][NFC] More efficient emitPatchpoint().
Denis Antrushin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 4 11:36:32 PDT 2020
dantrushin created this revision.
dantrushin added reviewers: efriedma, craig.topper, reames.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
Current implementation of emitPatchpoint() is very inefficient:
for every FrameIndex operand if creates new MachineInstr with
that operand expanded and all other copies as is.
Since PATCHPOINT/STATEPOINT instructions may have *a lot* of
FrameIndex operands, we end up creating and erasing many
machine instructions. But we can do it in single pass, with only
one new machine instruction generated.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D81181
Files:
llvm/lib/CodeGen/TargetLoweringBase.cpp
Index: llvm/lib/CodeGen/TargetLoweringBase.cpp
===================================================================
--- llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -1023,20 +1023,34 @@
// all stack slots), but we need to handle the different type of stackmap
// operands and memory effects here.
- // MI changes inside this loop as we grow operands.
- for(unsigned OperIdx = 0; OperIdx != MI->getNumOperands(); ++OperIdx) {
+ unsigned OperIdx = 0;
+ unsigned NumOpers = MI->getNumOperands();
+ for (; OperIdx < NumOpers; ++OperIdx)
+ if (MI->getOperand(OperIdx).isFI())
+ break;
+
+ if (OperIdx == NumOpers)
+ return MBB; // No frame indices seen, nothing to do.
+
+ MachineInstrBuilder MIB = BuildMI(MF, MI->getDebugLoc(), MI->getDesc());
+
+ for (unsigned i = 0; i < OperIdx; ++i)
+ MIB.add(MI->getOperand(i));
+
+ // Inherit previous memory operands.
+ MIB.cloneMemRefs(*MI);
+
+ for (; OperIdx < NumOpers; ++OperIdx) {
MachineOperand &MO = MI->getOperand(OperIdx);
- if (!MO.isFI())
+ if (!MO.isFI()) {
+ MIB.add(MI->getOperand(OperIdx));
continue;
+ }
// foldMemoryOperand builds a new MI after replacing a single FI operand
// with the canonical set of five x86 addressing-mode operands.
int FI = MO.getIndex();
- MachineInstrBuilder MIB = BuildMI(MF, MI->getDebugLoc(), MI->getDesc());
- // Copy operands before the frame-index.
- for (unsigned i = 0; i < OperIdx; ++i)
- MIB.add(MI->getOperand(i));
// Add frame index operands recognized by stackmaps.cpp
if (MFI.isStatepointSpillSlotObjectIndex(FI)) {
// indirect-mem-ref tag, size, #FI, offset.
@@ -1055,12 +1069,7 @@
MIB.add(MI->getOperand(OperIdx));
MIB.addImm(0);
}
- // Copy the operands after the frame index.
- for (unsigned i = OperIdx + 1; i != MI->getNumOperands(); ++i)
- MIB.add(MI->getOperand(i));
- // Inherit previous memory operands.
- MIB.cloneMemRefs(*MI);
assert(MIB->mayLoad() && "Folded a stackmap use to a non-load!");
// Add a new memory operand for this FI.
@@ -1075,13 +1084,9 @@
MF.getDataLayout().getPointerSize(), MFI.getObjectAlign(FI));
MIB->addMemOperand(MF, MMO);
}
-
- // Replace the instruction and update the operand index.
- MBB->insert(MachineBasicBlock::iterator(MI), MIB);
- OperIdx += (MIB->getNumOperands() - MI->getNumOperands()) - 1;
- MI->eraseFromParent();
- MI = MIB;
}
+ MBB->insert(MachineBasicBlock::iterator(MI), MIB);
+ MI->eraseFromParent();
return MBB;
}
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