[PATCH] D80999: [ARM][CodeGen] Enabling spilling of high registers in RegAllocFast for Thumb1

Lucas Prates via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 4 09:53:14 PDT 2020


pratlucas marked 2 inline comments as done.
pratlucas added a comment.

> This is intentionally not addressing greedy regalloc, I guess.

Yes. Currently, RegAllocFast is the only one that finds itself in need of spilling high registers. Other register allocators detect the interference between the inline asm inputs and the clobbered registers before allocating them, avoiding the spill.
If we ever want to make the high registers generally allocatable, though, the other allocators also need to be updated.

> I think ConstantIslands currently assumes LR is never live in Thumb1 mode. Have you looked at that at all? (Last time I looked at this, there was also ThumbRegisterInfo::saveScavengerRegister, but that's gone now.)

>From what I've checked, ConstantIslands assumes LR was spilled in the function epilog, so it is legal for it to make use of BL instructions.
This could only have an impact on explicit uses or clobbers of LR by the inline asm itself, which were already possible prior to this patch, so I believe it won't cause any issues.



================
Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:346
+    MCPhysReg SpillReg =
+        getFreeRegForAllocation(*Before, *SpillRC, Register(), Register());
+    BuildMI(*MBB, Before, Before->getDebugLoc(), TII->get(TargetOpcode::COPY),
----------------
efriedma wrote:
> Is it possible to spuriously run out of registers?  Say you have an inline asm that requires r0-r8.  You allocate r0-r7, then try to allocate r8, then we run out of registers because r0-r7 were already reserved.
Yes, it is possible but in rare circumstances as the high registers aren't generally allocatable.

For this to happen the specified high register needs a reason to be spilled, so it should either be high on the allocation order or the inline asm should have enough inputs to cause it to be previously allocated.

As we can't directly spill it, the only way I see around this is to re-allocate the clobbered registers to another available register whenever possible. If you agree, I can handle this in a separate patch as it might be out of this one's scope.


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