[llvm] a0dfdda - [VP][Fix] canIgnoreVectorLength for scalable types
Simon Moll via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 4 05:18:53 PDT 2020
Author: Simon Moll
Date: 2020-06-04T14:17:42+02:00
New Revision: a0dfdda4e5e8c3f33ccc80f289374a60943cb7c3
URL: https://github.com/llvm/llvm-project/commit/a0dfdda4e5e8c3f33ccc80f289374a60943cb7c3
DIFF: https://github.com/llvm/llvm-project/commit/a0dfdda4e5e8c3f33ccc80f289374a60943cb7c3.diff
LOG: [VP][Fix] canIgnoreVectorLength for scalable types
This patch fixes VPIntrinsic::canIgnoreVectorLength when used on a
VPIntrinsic with scalable vector types. Also includes new unittest cases
for the '<vscale x 1 x whatever>' and '%evl == vscale' corner cases.
Added:
Modified:
llvm/lib/IR/IntrinsicInst.cpp
llvm/unittests/IR/VPIntrinsicTest.cpp
Removed:
################################################################################
diff --git a/llvm/lib/IR/IntrinsicInst.cpp b/llvm/lib/IR/IntrinsicInst.cpp
index 6f6aefd9da56..c4e06cd979ed 100644
--- a/llvm/lib/IR/IntrinsicInst.cpp
+++ b/llvm/lib/IR/IntrinsicInst.cpp
@@ -289,15 +289,10 @@ bool VPIntrinsic::canIgnoreVectorLengthParam() const {
const auto &DL = ParMod->getDataLayout();
// Compare vscale patterns
- uint64_t ParamFactor;
- if (EC.Min > 1 &&
- match(VLParam, m_c_BinOp(m_ConstantInt(ParamFactor), m_VScale(DL)))) {
- return ParamFactor >= EC.Min;
- }
- if (match(VLParam, m_VScale(DL))) {
- return ParamFactor;
- }
- return false;
+ uint64_t VScaleFactor;
+ if (match(VLParam, m_c_Mul(m_ConstantInt(VScaleFactor), m_VScale(DL))))
+ return VScaleFactor >= EC.Min;
+ return (EC.Min == 1) && match(VLParam, m_VScale(DL));
}
// standard SIMD operation
diff --git a/llvm/unittests/IR/VPIntrinsicTest.cpp b/llvm/unittests/IR/VPIntrinsicTest.cpp
index 35a1f3e9b4d7..b923e35efc32 100644
--- a/llvm/unittests/IR/VPIntrinsicTest.cpp
+++ b/llvm/unittests/IR/VPIntrinsicTest.cpp
@@ -59,20 +59,27 @@ TEST_F(VPIntrinsicTest, CanIgnoreVectorLength) {
parseAssemblyString(
"declare <256 x i64> @llvm.vp.mul.v256i64(<256 x i64>, <256 x i64>, <256 x i1>, i32)"
"declare <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i1>, i32)"
+"declare <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i1>, i32)"
"declare i32 @llvm.vscale.i32()"
"define void @test_static_vlen( "
-" <256 x i64> %i0, <vscale x 2 x i64> %si0,"
-" <256 x i64> %i1, <vscale x 2 x i64> %si1,"
-" <256 x i1> %m, <vscale x 2 x i1> %sm, i32 %vl) { "
+" <256 x i64> %i0, <vscale x 2 x i64> %si0x2, <vscale x 1 x i64> %si0x1,"
+" <256 x i64> %i1, <vscale x 2 x i64> %si1x2, <vscale x 1 x i64> %si1x1,"
+" <256 x i1> %m, <vscale x 2 x i1> %smx2, <vscale x 1 x i1> %smx1, i32 %vl) { "
" %r0 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 %vl)"
" %r1 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 256)"
" %r2 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 0)"
" %r3 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 7)"
" %r4 = call <256 x i64> @llvm.vp.mul.v256i64(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 123)"
" %vs = call i32 @llvm.vscale.i32()"
-" %vs.i64 = mul i32 %vs, 2"
-" %r5 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0, <vscale x 2 x i64> %si1, <vscale x 2 x i1> %sm, i32 %vs.i64)"
-" %r6 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0, <vscale x 2 x i64> %si1, <vscale x 2 x i1> %sm, i32 99999)"
+" %vs.x2 = mul i32 %vs, 2"
+" %r5 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0x2, <vscale x 2 x i64> %si1x2, <vscale x 2 x i1> %smx2, i32 %vs.x2)"
+" %r6 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0x2, <vscale x 2 x i64> %si1x2, <vscale x 2 x i1> %smx2, i32 %vs)"
+" %r7 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0x2, <vscale x 2 x i64> %si1x2, <vscale x 2 x i1> %smx2, i32 99999)"
+" %r8 = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %si0x1, <vscale x 1 x i64> %si1x1, <vscale x 1 x i1> %smx1, i32 %vs)"
+" %r9 = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %si0x1, <vscale x 1 x i64> %si1x1, <vscale x 1 x i1> %smx1, i32 1)"
+" %r10 = call <vscale x 1 x i64> @llvm.vp.mul.nxv1i64(<vscale x 1 x i64> %si0x1, <vscale x 1 x i64> %si1x1, <vscale x 1 x i1> %smx1, i32 %vs.x2)"
+" %vs.wat = add i32 %vs, 2"
+" %r11 = call <vscale x 2 x i64> @llvm.vp.mul.nxv2i64(<vscale x 2 x i64> %si0x2, <vscale x 2 x i64> %si1x2, <vscale x 2 x i1> %smx2, i32 %vs.wat)"
" ret void "
"}",
Err, C);
@@ -80,8 +87,8 @@ TEST_F(VPIntrinsicTest, CanIgnoreVectorLength) {
auto *F = M->getFunction("test_static_vlen");
assert(F);
- const int NumExpected = 7;
- const bool Expected[] = {false, true, false, false, false, true, false};
+ const int NumExpected = 12;
+ const bool Expected[] = {false, true, false, false, false, true, false, false, true, false, true, false};
int i = 0;
for (auto &I : F->getEntryBlock()) {
VPIntrinsic *VPI = dyn_cast<VPIntrinsic>(&I);
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