[llvm] adf10dc - [DAG] scalarizeBinOpOfSplats - extract from the source of splat vector (PR46189)

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-06-04T11:58:59+01:00
New Revision: adf10dcf2e8dd04fd50fd976b9dc7e25ff0bba3b

URL: https://github.com/llvm/llvm-project/commit/adf10dcf2e8dd04fd50fd976b9dc7e25ff0bba3b
DIFF: https://github.com/llvm/llvm-project/commit/adf10dcf2e8dd04fd50fd976b9dc7e25ff0bba3b.diff

LOG: [DAG] scalarizeBinOpOfSplats - extract from the source of splat vector (PR46189)

D79003/rG9fa58d1bf2f8 exposed an issue with scalarizeBinOpOfSplats that we were extracting from the splatted vector result instead of the source, the splat index is only valid for the source vector not the result, which may contain undefs, including at the splat index.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/test/CodeGen/X86/pr46189.ll

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 5c954ab63aab..d960a7427176 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -20550,8 +20550,8 @@ static SDValue scalarizeBinOpOfSplats(SDNode *N, SelectionDAG &DAG) {
 
   SDLoc DL(N);
   SDValue IndexC = DAG.getVectorIdxConstant(Index0, DL);
-  SDValue X = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, N0, IndexC);
-  SDValue Y = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, N1, IndexC);
+  SDValue X = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Src0, IndexC);
+  SDValue Y = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Src1, IndexC);
   SDValue ScalarBO = DAG.getNode(Opcode, DL, EltVT, X, Y, N->getFlags());
 
   // If all lanes but 1 are undefined, no need to splat the scalar result.

diff  --git a/llvm/test/CodeGen/X86/pr46189.ll b/llvm/test/CodeGen/X86/pr46189.ll
index aea4a92cef4b..558483754c68 100644
--- a/llvm/test/CodeGen/X86/pr46189.ll
+++ b/llvm/test/CodeGen/X86/pr46189.ll
@@ -12,12 +12,13 @@ define { i64, i64 } @PR46189(double %0, double %1, double %2, double %3, double
 ; SSE-NEXT:    unpcklpd {{.*#+}} xmm3 = xmm3[0,0]
 ; SSE-NEXT:    divpd %xmm3, %xmm5
 ; SSE-NEXT:    cvttpd2dq %xmm5, %xmm0
-; SSE-NEXT:    subsd %xmm2, %xmm1
-; SSE-NEXT:    addsd %xmm2, %xmm2
-; SSE-NEXT:    unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
+; SSE-NEXT:    movapd %xmm1, %xmm3
+; SSE-NEXT:    subsd %xmm2, %xmm3
+; SSE-NEXT:    addsd %xmm2, %xmm1
+; SSE-NEXT:    unpcklpd {{.*#+}} xmm3 = xmm3[0],xmm1[0]
 ; SSE-NEXT:    unpcklpd {{.*#+}} xmm4 = xmm4[0,0]
-; SSE-NEXT:    divpd %xmm4, %xmm1
-; SSE-NEXT:    cvttpd2dq %xmm1, %xmm1
+; SSE-NEXT:    divpd %xmm4, %xmm3
+; SSE-NEXT:    cvttpd2dq %xmm3, %xmm1
 ; SSE-NEXT:    unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
 ; SSE-NEXT:    movq %xmm0, %rax
 ; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
@@ -32,9 +33,9 @@ define { i64, i64 } @PR46189(double %0, double %1, double %2, double %3, double
 ; AVX-NEXT:    vmovddup {{.*#+}} xmm3 = xmm3[0,0]
 ; AVX-NEXT:    vdivpd %xmm3, %xmm0, %xmm0
 ; AVX-NEXT:    vcvttpd2dq %xmm0, %xmm0
-; AVX-NEXT:    vsubsd %xmm2, %xmm1, %xmm1
-; AVX-NEXT:    vaddsd %xmm2, %xmm0, %xmm2
-; AVX-NEXT:    vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
+; AVX-NEXT:    vsubsd %xmm2, %xmm1, %xmm3
+; AVX-NEXT:    vaddsd %xmm2, %xmm1, %xmm1
+; AVX-NEXT:    vunpcklpd {{.*#+}} xmm1 = xmm3[0],xmm1[0]
 ; AVX-NEXT:    vmovddup {{.*#+}} xmm2 = xmm4[0,0]
 ; AVX-NEXT:    vdivpd %xmm2, %xmm1, %xmm1
 ; AVX-NEXT:    vcvttpd2dq %xmm1, %xmm1