[llvm] d20fdca - [AIX] Update data directives for AIX assembly
David Tenty via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 3 07:56:07 PDT 2020
Author: David Tenty
Date: 2020-06-03T10:55:59-04:00
New Revision: d20fdcabf82fb30239a3f361950814e39e4c20a8
URL: https://github.com/llvm/llvm-project/commit/d20fdcabf82fb30239a3f361950814e39e4c20a8
DIFF: https://github.com/llvm/llvm-project/commit/d20fdcabf82fb30239a3f361950814e39e4c20a8.diff
LOG: [AIX] Update data directives for AIX assembly
Summary:
The standard data emission directives (e.g. .short, .long) in the AIX assembler
have the unintended consequence of aligning their output to the natural byte
boundary. This cause problems because we aren't expecting behavior from the
Data*bitsDirectives, so the final alignment of data isn't correct in some cases
on AIX.
This patch updated the Data*bitsDirectives to use .vbyte pseudo-ops instead to emit the
data, since we will emit the .align directives as needed. We update the existing
testcases and add a test for emission of struct data.
Reviewers: hubert.reinterpretcast, Xiangling_L, jasonliu
Reviewed By: hubert.reinterpretcast, jasonliu
Subscribers: wuzish, nemanjai, hiraditya, kbarton, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80934
Added:
Modified:
llvm/lib/MC/MCAsmInfoXCOFF.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
llvm/test/CodeGen/PowerPC/aix-extern.ll
llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
llvm/test/CodeGen/PowerPC/aix-weak.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
llvm/test/CodeGen/PowerPC/test_func_desc.ll
Removed:
################################################################################
diff --git a/llvm/lib/MC/MCAsmInfoXCOFF.cpp b/llvm/lib/MC/MCAsmInfoXCOFF.cpp
index 479578fca9a8..1d4d4ad83898 100644
--- a/llvm/lib/MC/MCAsmInfoXCOFF.cpp
+++ b/llvm/lib/MC/MCAsmInfoXCOFF.cpp
@@ -20,7 +20,12 @@ MCAsmInfoXCOFF::MCAsmInfoXCOFF() {
ZeroDirectiveSupportsNonZeroValue = false;
AsciiDirective = nullptr; // not supported
AscizDirective = nullptr; // not supported
- Data64bitsDirective = "\t.llong\t";
+
+ // Use .vbyte for data definition to avoid directives that apply an implicit
+ // alignment.
+ Data16bitsDirective = "\t.vbyte\t2, ";
+ Data32bitsDirective = "\t.vbyte\t4, ";
+
COMMDirectiveAlignmentIsInBytes = false;
LCOMMDirectiveAlignmentType = LCOMM::Log2Alignment;
HasDotTypeDotSizeDirective = false;
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
index d9587ec9bc0f..593dc2843c3d 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
@@ -59,4 +59,7 @@ PPCXCOFFMCAsmInfo::PPCXCOFFMCAsmInfo(bool Is64Bit, const Triple &T) {
if (T.getArch() == Triple::ppc64le)
report_fatal_error("XCOFF is not supported for little-endian targets");
CodePointerSize = CalleeSaveStackSlotSize = Is64Bit ? 8 : 4;
+
+ // A size of 8 is only supported by the assembler under 64-bit.
+ Data64bitsDirective = Is64Bit ? "\t.vbyte\t8, " : nullptr;
}
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
index e2e6ff18aefa..9e0c4605f8bb 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
@@ -36,12 +36,12 @@ declare extern_weak void @foo_ext_weak(i32*)
; COMMON-NEXT: .globl .main
; COMMON-NEXT: .align 4
; COMMON-NEXT: .csect main[DS]
-; BIT32-NEXT: .long .main # @main
-; BIT32-NEXT: .long TOC[TC0]
-; BIT32-NEXT: .long 0
-; BIT64-NEXT: .llong .main # @main
-; BIT64-NEXT: .llong TOC[TC0]
-; BIT64-NEXT: .llong 0
+; BIT32-NEXT: .vbyte 4, .main # @main
+; BIT32-NEXT: .vbyte 4, TOC[TC0]
+; BIT32-NEXT: .vbyte 4, 0
+; BIT64-NEXT: .vbyte 8, .main # @main
+; BIT64-NEXT: .vbyte 8, TOC[TC0]
+; BIT64-NEXT: .vbyte 8, 0
; COMMON-NEXT: .csect .text[PR]
; COMMON-NEXT: .main:
@@ -50,8 +50,8 @@ declare extern_weak void @foo_ext_weak(i32*)
; BIT32-NEXT: .align 2
; BIT64-NEXT: .align 3
; COMMON-NEXT: foo_ext_weak_p:
-; BIT32-NEXT: .long foo_ext_weak_ref[DS]
-; BIT64-NEXT: .llong foo_ext_weak_ref[DS]
+; BIT32-NEXT: .vbyte 4, foo_ext_weak_ref[DS]
+; BIT64-NEXT: .vbyte 8, foo_ext_weak_ref[DS]
; COMMON-NEXT: .weak b_w[UA]
; COMMON-NEXT: .weak foo_ext_weak_ref[DS]
; COMMON-NEXT: .weak .foo_ext_weak
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern.ll b/llvm/test/CodeGen/PowerPC/aix-extern.ll
index e5ec5db235a6..1650c508be4a 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern.ll
@@ -42,12 +42,12 @@ declare i32 @bar_extern(i32*)
; COMMON-NEXT: .globl .foo
; COMMON-NEXT: .align 4
; COMMON-NEXT: .csect foo[DS]
-; BIT32-NEXT: .long .foo # @foo
-; BIT32-NEXT: .long TOC[TC0]
-; BIT32-NEXT: .long 0
-; BIT64-NEXT: .llong .foo # @foo
-; BIT64-NEXT: .llong TOC[TC0]
-; BIT64-NEXT: .llong 0
+; BIT32-NEXT: .vbyte 4, .foo # @foo
+; BIT32-NEXT: .vbyte 4, TOC[TC0]
+; BIT32-NEXT: .vbyte 4, 0
+; BIT64-NEXT: .vbyte 8, .foo # @foo
+; BIT64-NEXT: .vbyte 8, TOC[TC0]
+; BIT64-NEXT: .vbyte 8, 0
; COMMON-NEXT: .csect .text[PR]
; COMMON-NEXT: .foo:
@@ -55,12 +55,12 @@ declare i32 @bar_extern(i32*)
; COMMON-NEXT: .globl .main
; COMMON-NEXT: .align 4
; COMMON-NEXT: .csect main[DS]
-; BIT32-NEXT: .long .main # @main
-; BIT32-NEXT: .long TOC[TC0]
-; BIT32-NEXT: .long 0
-; BIT64-NEXT: .llong .main # @main
-; BIT64-NEXT: .llong TOC[TC0]
-; BIT64-NEXT: .llong 0
+; BIT32-NEXT: .vbyte 4, .main # @main
+; BIT32-NEXT: .vbyte 4, TOC[TC0]
+; BIT32-NEXT: .vbyte 4, 0
+; BIT64-NEXT: .vbyte 8, .main # @main
+; BIT64-NEXT: .vbyte 8, TOC[TC0]
+; BIT64-NEXT: .vbyte 8, 0
; COMMON-NEXT: .csect .text[PR]
; COMMON-NEXT: .main:
@@ -69,8 +69,8 @@ declare i32 @bar_extern(i32*)
; BIT32-NEXT: .align 2
; BIT64-NEXT: .align 3
; COMMON-NEXT: bar_p:
-; BIT32-NEXT: .long bar_ref[DS]
-; BIT64-NEXT: .llong bar_ref[DS]
+; BIT32-NEXT: .vbyte 4, bar_ref[DS]
+; BIT64-NEXT: .vbyte 8, bar_ref[DS]
; COMMON-NEXT: .extern b_e[UA]
; COMMON-NEXT: .extern .bar_ref
; COMMON-NEXT: .extern bar_ref[DS]
diff --git a/llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll b/llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
index ce244509c918..484a2e45714a 100644
--- a/llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
@@ -48,7 +48,7 @@ entry:
; 32SMALL-ASM: .csect .rodata[RO],2
; 32SMALL-ASM: .align 2
; 32SMALL-ASM: .LCPI0_0:
-; 32SMALL-ASM: .long 0x40b00000
+; 32SMALL-ASM: .vbyte 4, 0x40b00000
; 32SMALL-ASM: .test_float:
; 32SMALL-ASM: lwz [[REG1:[0-9]+]], LC0(2)
; 32SMALL-ASM: lfs 1, 0([[REG1]])
@@ -57,7 +57,7 @@ entry:
; 32LARGE-ASM: .csect .rodata[RO],2
; 32LARGE-ASM: .align 2
; 32LARGE-ASM: .LCPI0_0:
-; 32LARGE-ASM: .long 0x40b00000
+; 32LARGE-ASM: .vbyte 4, 0x40b00000
; 32LARGE-ASM: .test_float:
; 32LARGE-ASM: addis [[REG1:[0-9]+]], LC0 at u(2)
; 32LARGE-ASM: lwz [[REG2:[0-9]+]], LC0 at l([[REG1]])
@@ -67,7 +67,7 @@ entry:
; 64SMALL-ASM: .csect .rodata[RO],2
; 64SMALL-ASM: .align 2
; 64SMALL-ASM: .LCPI0_0:
-; 64SMALL-ASM: .long 0x40b00000
+; 64SMALL-ASM: .vbyte 4, 0x40b00000
; 64SMALL-ASM: .test_float:
; 64SMALL-ASM: ld [[REG1:[0-9]+]], LC0(2)
; 64SMALL-ASM: lfs 1, 0([[REG1]])
@@ -76,7 +76,7 @@ entry:
; 64LARGE-ASM: .csect .rodata[RO],2
; 64LARGE-ASM: .align 2
; 64LARGE-ASM: .LCPI0_0:
-; 64LARGE-ASM: .long 0x40b00000
+; 64LARGE-ASM: .vbyte 4, 0x40b00000
; 64LARGE-ASM: .test_float:
; 64LARGE-ASM: addis [[REG1:[0-9]+]], LC0 at u(2)
; 64LARGE-ASM: ld [[REG2:[0-9]+]], LC0 at l([[REG1]])
diff --git a/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll b/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
index 0bf169d7c748..11b17dd3da39 100644
--- a/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
@@ -99,10 +99,10 @@
; 32SMALL-ASM: .csect .rodata[RO],2
; 32SMALL-ASM: .align 2
; 32SMALL-ASM: .LJTI0_0:
-; 32SMALL-ASM: .long LBB0_2-.LJTI0_0
-; 32SMALL-ASM: .long LBB0_3-.LJTI0_0
-; 32SMALL-ASM: .long LBB0_4-.LJTI0_0
-; 32SMALL-ASM: .long LBB0_5-.LJTI0_0
+; 32SMALL-ASM: .vbyte 4, LBB0_2-.LJTI0_0
+; 32SMALL-ASM: .vbyte 4, LBB0_3-.LJTI0_0
+; 32SMALL-ASM: .vbyte 4, LBB0_4-.LJTI0_0
+; 32SMALL-ASM: .vbyte 4, LBB0_5-.LJTI0_0
; 32LARGE-ASM-LABEL: jump_table
; 32LARGE-ASM: .jump_table:
@@ -126,10 +126,10 @@
; 32LARGE-ASM: .csect .rodata[RO],2
; 32LARGE-ASM: .align 2
; 32LARGE-ASM: .LJTI0_0:
-; 32LARGE-ASM: .long LBB0_2-.LJTI0_0
-; 32LARGE-ASM: .long LBB0_3-.LJTI0_0
-; 32LARGE-ASM: .long LBB0_4-.LJTI0_0
-; 32LARGE-ASM: .long LBB0_5-.LJTI0_0
+; 32LARGE-ASM: .vbyte 4, LBB0_2-.LJTI0_0
+; 32LARGE-ASM: .vbyte 4, LBB0_3-.LJTI0_0
+; 32LARGE-ASM: .vbyte 4, LBB0_4-.LJTI0_0
+; 32LARGE-ASM: .vbyte 4, LBB0_5-.LJTI0_0
; 64SMALL-ASM-LABEL: jump_table
; 64SMALL-ASM: .jump_table:
@@ -152,10 +152,10 @@
; 64SMALL-ASM: .csect .rodata[RO],2
; 64SMALL-ASM: .align 2
; 64SMALL-ASM: .LJTI0_0:
-; 64SMALL-ASM: .long LBB0_2-.LJTI0_0
-; 64SMALL-ASM: .long LBB0_3-.LJTI0_0
-; 64SMALL-ASM: .long LBB0_4-.LJTI0_0
-; 64SMALL-ASM: .long LBB0_5-.LJTI0_0
+; 64SMALL-ASM: .vbyte 4, LBB0_2-.LJTI0_0
+; 64SMALL-ASM: .vbyte 4, LBB0_3-.LJTI0_0
+; 64SMALL-ASM: .vbyte 4, LBB0_4-.LJTI0_0
+; 64SMALL-ASM: .vbyte 4, LBB0_5-.LJTI0_0
; 64LARGE-ASM-LABEL: jump_table
; 64LARGE-ASM: .jump_table:
@@ -179,10 +179,10 @@
; 64LARGE-ASM: .csect .rodata[RO],2
; 64LARGE-ASM: .align 2
; 64LARGE-ASM: .LJTI0_0:
-; 64LARGE-ASM: .long LBB0_2-.LJTI0_0
-; 64LARGE-ASM: .long LBB0_3-.LJTI0_0
-; 64LARGE-ASM: .long LBB0_4-.LJTI0_0
-; 64LARGE-ASM: .long LBB0_5-.LJTI0_0
+; 64LARGE-ASM: .vbyte 4, LBB0_2-.LJTI0_0
+; 64LARGE-ASM: .vbyte 4, LBB0_3-.LJTI0_0
+; 64LARGE-ASM: .vbyte 4, LBB0_4-.LJTI0_0
+; 64LARGE-ASM: .vbyte 4, LBB0_5-.LJTI0_0
; CHECK: .toc
; CHECK: .tc .LJTI0_0[TC],.LJTI0_0
diff --git a/llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll b/llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
index 706727ead466..115938ad6b7d 100644
--- a/llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
@@ -9,11 +9,11 @@
;CHECK-NEXT: .globl b
;CHECK-NEXT: .align 2
;CHECK-NEXT: b:
-;CHECK-NEXT: .long a
+;CHECK-NEXT: .vbyte 4, a
;CHECK64: .comm a[RW],4,2
;CHECK64-NEXT: .csect .data[RW],3
;CHECK64-NEXT: .globl b
;CHECK64-NEXT: .align 3
;CHECK64-NEXT: b:
-;CHECK64-NEXT: .llong a
+;CHECK64-NEXT: .vbyte 8, a
diff --git a/llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll b/llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
index 87ebd19418c1..9b078a1f0f8a 100644
--- a/llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
@@ -15,20 +15,20 @@ entry:
;CHECK-NEXT: .globl foo_ptr
;CHECK-NEXT: .align 2
;CHECK-NEXT: foo_ptr:
-;CHECK-NEXT: .long foo[DS]
+;CHECK-NEXT: .vbyte 4, foo[DS]
;CHECK-NEXT: .globl bar_ptr1
;CHECK-NEXT: .align 2
;CHECK-NEXT: bar_ptr1:
-;CHECK-NEXT: .long bar[DS]
+;CHECK-NEXT: .vbyte 4, bar[DS]
;CHECK-NEXT: .extern foo[DS]
;CHECK64: .csect .data[RW],3
;CHECK64-NEXT: .globl foo_ptr
;CHECK64-NEXT: .align 3
;CHECK64-NEXT: foo_ptr:
-;CHECK64-NEXT: .llong foo[DS]
+;CHECK64-NEXT: .vbyte 8, foo[DS]
;CHECK64-NEXT: .globl bar_ptr1
;CHECK64-NEXT: .align 3
;CHECK64-NEXT: bar_ptr1:
-;CHECK64-NEXT: .llong bar[DS]
+;CHECK64-NEXT: .vbyte 8, bar[DS]
;CHECK64-NEXT: .extern foo[DS]
diff --git a/llvm/test/CodeGen/PowerPC/aix-weak.ll b/llvm/test/CodeGen/PowerPC/aix-weak.ll
index 3a7f05004907..8db8ceb086f0 100644
--- a/llvm/test/CodeGen/PowerPC/aix-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-weak.ll
@@ -45,12 +45,12 @@ entry:
; COMMON-NEXT: .weak .foo_weak
; COMMON-NEXT: .align 4
; COMMON-NEXT: .csect foo_weak[DS]
-; BIT32-NEXT: .long .foo_weak # @foo_weak
-; BIT32-NEXT: .long TOC[TC0]
-; BIT32-NEXT: .long 0
-; BIT64-NEXT: .llong .foo_weak # @foo_weak
-; BIT64-NEXT: .llong TOC[TC0]
-; BIT64-NEXT: .llong 0
+; BIT32-NEXT: .vbyte 4, .foo_weak # @foo_weak
+; BIT32-NEXT: .vbyte 4, TOC[TC0]
+; BIT32-NEXT: .vbyte 4, 0
+; BIT64-NEXT: .vbyte 8, .foo_weak # @foo_weak
+; BIT64-NEXT: .vbyte 8, TOC[TC0]
+; BIT64-NEXT: .vbyte 8, 0
; COMMON-NEXT: .csect .text[PR]
; COMMON-NEXT: .foo_weak:
@@ -58,12 +58,12 @@ entry:
; COMMON-NEXT: .weak .foo_ref_weak
; COMMON-NEXT: .align 4
; COMMON-NEXT: .csect foo_ref_weak[DS]
-; BIT32-NEXT: .long .foo_ref_weak # @foo_ref_weak
-; BIT32-NEXT: .long TOC[TC0]
-; BIT32-NEXT: .long 0
-; BIT64-NEXT: .llong .foo_ref_weak # @foo_ref_weak
-; BIT64-NEXT: .llong TOC[TC0]
-; BIT64-NEXT: .llong 0
+; BIT32-NEXT: .vbyte 4, .foo_ref_weak # @foo_ref_weak
+; BIT32-NEXT: .vbyte 4, TOC[TC0]
+; BIT32-NEXT: .vbyte 4, 0
+; BIT64-NEXT: .vbyte 8, .foo_ref_weak # @foo_ref_weak
+; BIT64-NEXT: .vbyte 8, TOC[TC0]
+; BIT64-NEXT: .vbyte 8, 0
; COMMON-NEXT: .csect .text[PR]
; COMMON-NEXT: .foo_ref_weak:
@@ -71,12 +71,12 @@ entry:
; COMMON-NEXT: .globl .main
; COMMON-NEXT: .align 4
; COMMON-NEXT: .csect main[DS]
-; BIT32-NEXT: .long .main # @main
-; BIT32-NEXT: .long TOC[TC0]
-; BIT32-NEXT: .long 0
-; BIT64-NEXT: .llong .main # @main
-; BIT64-NEXT: .llong TOC[TC0]
-; BIT64-NEXT: .llong 0
+; BIT32-NEXT: .vbyte 4, .main # @main
+; BIT32-NEXT: .vbyte 4, TOC[TC0]
+; BIT32-NEXT: .vbyte 4, 0
+; BIT64-NEXT: .vbyte 8, .main # @main
+; BIT64-NEXT: .vbyte 8, TOC[TC0]
+; BIT64-NEXT: .vbyte 8, 0
; COMMON-NEXT: .csect .text[PR]
; COMMON-NEXT: .main:
@@ -85,12 +85,12 @@ entry:
; BIT32-NEXT: .align 2
; BIT64-NEXT: .align 3
; COMMON-NEXT: foo_weak_p:
-; BIT32-NEXT: .long foo_ref_weak[DS]
-; BIT64-NEXT: .llong foo_ref_weak[DS]
+; BIT32-NEXT: .vbyte 4, foo_ref_weak[DS]
+; BIT64-NEXT: .vbyte 8, foo_ref_weak[DS]
; COMMON-NEXT: .weak b
; COMMON-NEXT: .align 2
; COMMON-NEXT: b:
-; COMMON-NEXT: .long 0 # 0x0
+; COMMON-NEXT: .vbyte 4, 0 # 0x0
; COMMON-NEXT: .toc
; COMMON-NEXT: LC0:
; COMMON-NEXT: .tc foo_weak_p[TC],foo_weak_p
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
index 025a4f5f462f..4083bd58fe98 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
@@ -1,8 +1,8 @@
; This file tests the codegen of initialized and common variables in AIX
; assembly and XCOFF object files.
-; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
-; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
+; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefixes=CHECK,CHECK32 %s
+; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers --file-header %t.o | \
@@ -25,6 +25,12 @@
@s_0 = global i16 0, align 2
@f_0 = global float 0.000000e+00, align 4
+%struct.anon = type <{ i32, double }>
+ at astruct = global [1 x %struct.anon] [%struct.anon <{ i32 1, double 7.000000e+00 }>], align 1
+
+%struct.anon2 = type { double, i32 }
+ at bstruct = global [1 x %struct.anon2] [%struct.anon2 { double 7.000000e+00 , i32 1}], align 8
+
@a = common global i32 0, align 4
@b = common global i64 0, align 8
@c = common global i16 0, align 2
@@ -45,32 +51,38 @@
; CHECK-NEXT: .globl ivar
; CHECK-NEXT: .align 2
; CHECK-NEXT: ivar:
-; CHECK-NEXT: .long 35
+; CHECK-NEXT: .vbyte 4, 35
; CHECK: .globl llvar
; CHECK-NEXT: .align 3
; CHECK-NEXT: llvar:
-; CHECK-NEXT: .llong 36
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK32-NEXT: .vbyte 4, 36
+; CHECK64-NEXT: .vbyte 8, 36
; CHECK: .globl svar
; CHECK-NEXT: .align 1
; CHECK-NEXT: svar:
-; CHECK-NEXT: .short 37
+; CHECK-NEXT: .vbyte 2, 37
; CHECK: .globl fvar
; CHECK-NEXT: .align 2
; CHECK-NEXT: fvar:
-; CHECK-NEXT: .long 0x44480000
+; CHECK-NEXT: .vbyte 4, 0x44480000
; CHECK: .globl dvar
; CHECK-NEXT: .align 3
; CHECK-NEXT: dvar:
-; CHECK-NEXT: .llong 0x408c200000000000
+; CHECK32-NEXT: .vbyte 4, 1082925056
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x408c200000000000
; CHECK: .globl over_aligned
; CHECK-NEXT: .align 5
; CHECK-NEXT: over_aligned:
-; CHECK-NEXT: .llong 0x408c200000000000
+; CHECK32-NEXT: .vbyte 4, 1082925056
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x408c200000000000
; CHECK: .globl chrarray
; CHECK-NEXT: chrarray:
@@ -82,25 +94,52 @@
; CHECK: .globl dblarr
; CHECK-NEXT: .align 3
; CHECK-NEXT: dblarr:
-; CHECK-NEXT: .llong 0x3ff0000000000000
-; CHECK-NEXT: .llong 0x4000000000000000
-; CHECK-NEXT: .llong 0x4008000000000000
-; CHECK-NEXT: .llong 0x4010000000000000
+; CHECK32-NEXT: .vbyte 4, 1072693248
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x3ff0000000000000
+; CHECK32-NEXT: .vbyte 4, 1073741824
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x4000000000000000
+; CHECK32-NEXT: .vbyte 4, 1074266112
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x4008000000000000
+; CHECK32-NEXT: .vbyte 4, 1074790400
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x4010000000000000
; CHECK: .globl d_0
; CHECK-NEXT: .align 3
; CHECK-NEXT: d_0:
-; CHECK-NEXT: .llong 0
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0
; CHECK: .globl s_0
; CHECK-NEXT: .align 1
; CHECK-NEXT: s_0:
-; CHECK-NEXT: .short 0
+; CHECK-NEXT: .vbyte 2, 0
; CHECK: .globl f_0
; CHECK-NEXT: .align 2
; CHECK-NEXT: f_0:
-; CHECK-NEXT: .long 0
+; CHECK-NEXT: .vbyte 4, 0
+
+; CHECK: .globl astruct
+; CHECK-NEXT: astruct:
+; CHECK-NEXT: .vbyte 4, 1
+; CHECK32-NEXT: .vbyte 4, 1075576832
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x401c000000000000
+
+; CHECK: .globl bstruct
+; CHECK-NEXT: .align 3
+; CHECK-NEXT: bstruct:
+; CHECK32-NEXT: .vbyte 4, 1075576832
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x401c000000000000
+; CHECK-NEXT: .vbyte 4, 1
+; CHECK-NEXT: .space 4
+
; CHECK-NEXT: .comm a[RW],4,2
; CHECK-NEXT: .comm b[RW],8,3
@@ -118,8 +157,8 @@
; OBJ-NEXT: Magic: 0x1DF
; OBJ-NEXT: NumberOfSections: 3
; OBJ-NEXT: TimeStamp:
-; OBJ-NEXT: SymbolTableOffset: 0xEC
-; OBJ-NEXT: SymbolTableEntries: 40
+; OBJ-NEXT: SymbolTableOffset: 0x10C
+; OBJ-NEXT: SymbolTableEntries: 44
; OBJ-NEXT: OptionalHeaderSize: 0x0
; OBJ-NEXT: Flags: 0x0
; OBJ-NEXT: }
@@ -144,7 +183,7 @@
; OBJ-NEXT: Name: .data
; OBJ-NEXT: PhysicalAddress: 0x0
; OBJ-NEXT: VirtualAddress: 0x0
-; OBJ-NEXT: Size: 0x60
+; OBJ-NEXT: Size: 0x80
; OBJ-NEXT: RawDataOffset: 0x8C
; OBJ-NEXT: RelocationPointer: 0x0
; OBJ-NEXT: LineNumberPointer: 0x0
@@ -156,8 +195,8 @@
; OBJ: Section {
; OBJ-NEXT: Index: 3
; OBJ-NEXT: Name: .bss
-; OBJ-NEXT: PhysicalAddress: 0x60
-; OBJ-NEXT: VirtualAddress: 0x60
+; OBJ-NEXT: PhysicalAddress: 0x80
+; OBJ-NEXT: VirtualAddress: 0x80
; OBJ-NEXT: Size: 0x6C
; OBJ-NEXT: RawDataOffset: 0x0
; OBJ-NEXT: RelocationPointer: 0x0
@@ -204,7 +243,7 @@
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+3]]
-; SYMS-NEXT: SectionLen: 96
+; SYMS-NEXT: SectionLen: 128
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 5
@@ -448,14 +487,56 @@
; SYMS: Symbol {
; SYMS-NEXT: Index: [[#INDX+26]]
-; SYMS-NEXT: Name: a
+; SYMS-NEXT: Name: astruct
; SYMS-NEXT: Value (RelocatableAddress): 0x60
-; SYMS-NEXT: Section: .bss
+; SYMS-NEXT: Section: .data
; SYMS-NEXT: Type: 0x0
; SYMS-NEXT: StorageClass: C_EXT (0x2)
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+27]]
+; SYMS-NEXT: ContainingCsectSymbolIndex: [[#INDX+2]]
+; SYMS-NEXT: ParameterHashIndex: 0x0
+; SYMS-NEXT: TypeChkSectNum: 0x0
+; SYMS-NEXT: SymbolAlignmentLog2: 0
+; SYMS-NEXT: SymbolType: XTY_LD (0x2)
+; SYMS-NEXT: StorageMappingClass: XMC_RW (0x5)
+; SYMS-NEXT: StabInfoIndex: 0x0
+; SYMS-NEXT: StabSectNum: 0x0
+; SYMS-NEXT: }
+; SYMS-NEXT: }
+
+; SYMS: Symbol {
+; SYMS-NEXT: Index: [[#INDX+28]]
+; SYMS-NEXT: Name: bstruct
+; SYMS-NEXT: Value (RelocatableAddress): 0x70
+; SYMS-NEXT: Section: .data
+; SYMS-NEXT: Type: 0x0
+; SYMS-NEXT: StorageClass: C_EXT (0x2)
+; SYMS-NEXT: NumberOfAuxEntries: 1
+; SYMS-NEXT: CSECT Auxiliary Entry {
+; SYMS-NEXT: Index: [[#INDX+29]]
+; SYMS-NEXT: ContainingCsectSymbolIndex: [[#INDX+2]]
+; SYMS-NEXT: ParameterHashIndex: 0x0
+; SYMS-NEXT: TypeChkSectNum: 0x0
+; SYMS-NEXT: SymbolAlignmentLog2: 0
+; SYMS-NEXT: SymbolType: XTY_LD (0x2)
+; SYMS-NEXT: StorageMappingClass: XMC_RW (0x5)
+; SYMS-NEXT: StabInfoIndex: 0x0
+; SYMS-NEXT: StabSectNum: 0x0
+; SYMS-NEXT: }
+; SYMS-NEXT: }
+
+; SYMS: Symbol {
+; SYMS-NEXT: Index: [[#INDX+30]]
+; SYMS-NEXT: Name: a
+; SYMS-NEXT: Value (RelocatableAddress): 0x80
+; SYMS-NEXT: Section: .bss
+; SYMS-NEXT: Type: 0x0
+; SYMS-NEXT: StorageClass: C_EXT (0x2)
+; SYMS-NEXT: NumberOfAuxEntries: 1
+; SYMS-NEXT: CSECT Auxiliary Entry {
+; SYMS-NEXT: Index: [[#INDX+31]]
; SYMS-NEXT: SectionLen: 4
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
@@ -468,15 +549,15 @@
; SYMS-NEXT: }
; SYMS: Symbol {
-; SYMS-NEXT: Index: [[#INDX+28]]
+; SYMS-NEXT: Index: [[#INDX+32]]
; SYMS-NEXT: Name: b
-; SYMS-NEXT: Value (RelocatableAddress): 0x68
+; SYMS-NEXT: Value (RelocatableAddress): 0x88
; SYMS-NEXT: Section: .bss
; SYMS-NEXT: Type: 0x0
; SYMS-NEXT: StorageClass: C_EXT (0x2)
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
-; SYMS-NEXT: Index: [[#INDX+29]]
+; SYMS-NEXT: Index: [[#INDX+33]]
; SYMS-NEXT: SectionLen: 8
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
@@ -489,15 +570,15 @@
; SYMS-NEXT: }
; SYMS: Symbol {
-; SYMS-NEXT: Index: [[#INDX+30]]
+; SYMS-NEXT: Index: [[#INDX+34]]
; SYMS-NEXT: Name: c
-; SYMS-NEXT: Value (RelocatableAddress): 0x70
+; SYMS-NEXT: Value (RelocatableAddress): 0x90
; SYMS-NEXT: Section: .bss
; SYMS-NEXT: Type: 0x0
; SYMS-NEXT: StorageClass: C_EXT (0x2)
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
-; SYMS-NEXT: Index: [[#INDX+31]]
+; SYMS-NEXT: Index: [[#INDX+35]]
; SYMS-NEXT: SectionLen: 2
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
@@ -510,15 +591,15 @@
; SYMS-NEXT: }
; SYMS: Symbol {
-; SYMS-NEXT: Index: [[#INDX+32]]
+; SYMS-NEXT: Index: [[#INDX+36]]
; SYMS-NEXT: Name: d
-; SYMS-NEXT: Value (RelocatableAddress): 0x78
+; SYMS-NEXT: Value (RelocatableAddress): 0x98
; SYMS-NEXT: Section: .bss
; SYMS-NEXT: Type: 0x0
; SYMS-NEXT: StorageClass: C_EXT (0x2)
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
-; SYMS-NEXT: Index: [[#INDX+33]]
+; SYMS-NEXT: Index: [[#INDX+37]]
; SYMS-NEXT: SectionLen: 8
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
@@ -531,15 +612,15 @@
; SYMS-NEXT: }
; SYMS: Symbol {
-; SYMS-NEXT: Index: [[#INDX+34]]
+; SYMS-NEXT: Index: [[#INDX+38]]
; SYMS-NEXT: Name: f
-; SYMS-NEXT: Value (RelocatableAddress): 0x80
+; SYMS-NEXT: Value (RelocatableAddress): 0xA0
; SYMS-NEXT: Section: .bss
; SYMS-NEXT: Type: 0x0
; SYMS-NEXT: StorageClass: C_EXT (0x2)
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
-; SYMS-NEXT: Index: [[#INDX+35]]
+; SYMS-NEXT: Index: [[#INDX+39]]
; SYMS-NEXT: SectionLen: 4
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
@@ -552,15 +633,15 @@
; SYMS-NEXT: }
; SYMS: Symbol {
-; SYMS-NEXT: Index: [[#INDX+36]]
+; SYMS-NEXT: Index: [[#INDX+40]]
; SYMS-NEXT: Name: over_aligned_comm
-; SYMS-NEXT: Value (RelocatableAddress): 0xA0
+; SYMS-NEXT: Value (RelocatableAddress): 0xC0
; SYMS-NEXT: Section: .bss
; SYMS-NEXT: Type: 0x0
; SYMS-NEXT: StorageClass: C_EXT (0x2)
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
-; SYMS-NEXT: Index: [[#INDX+37]]
+; SYMS-NEXT: Index: [[#INDX+41]]
; SYMS-NEXT: SectionLen: 8
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
@@ -573,15 +654,15 @@
; SYMS-NEXT: }
; SYMS: Symbol {
-; SYMS-NEXT: Index: [[#INDX+38]]
+; SYMS-NEXT: Index: [[#INDX+42]]
; SYMS-NEXT: Name: array
-; SYMS-NEXT: Value (RelocatableAddress): 0xA8
+; SYMS-NEXT: Value (RelocatableAddress): 0xC8
; SYMS-NEXT: Section: .bss
; SYMS-NEXT: Type: 0x0
; SYMS-NEXT: StorageClass: C_EXT (0x2)
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
-; SYMS-NEXT: Index: [[#INDX+39]]
+; SYMS-NEXT: Index: [[#INDX+43]]
; SYMS-NEXT: SectionLen: 33
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
index 4c8f18360b7a..a7db7f8fdf8d 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
@@ -19,8 +19,8 @@
; ASM32-NEXT: .align 2
; ASM64-NEXT: .align 3
; CHECK-NEXT:pointer:
-; ASM32-NEXT: .long common[RW]
-; ASM64-NEXT: .llong common[RW]
+; ASM32-NEXT: .vbyte 4, common[RW]
+; ASM64-NEXT: .vbyte 8, common[RW]
; RELOC: Relocations [
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
index 011cd859ce3b..09a9c4dc80f3 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
@@ -1,7 +1,7 @@
; This file tests the codegen of mergeable const in AIX assembly.
; This file also tests mergeable const in XCOFF object file generation.
-; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefixes=CHECK,CHECK32 %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s
; RUN: llvm-readobj -syms %t.o | FileCheck --check-prefix=CHECKSYM %s
@@ -23,26 +23,36 @@ entry:
}
;CHECK: .csect .rodata[RO],4
+
;CHECK-NEXT: .align 4
;CHECK-NEXT: .L__const.main.cnst32:
-;CHECK-NEXT: .llong 4611686018427387954
-;CHECK-NEXT: .long 0 # 0x0
-;CHECK-NEXT: .space 4
-;CHECK-NEXT: .llong 0
-;CHECK-NEXT: .long 0 # 0x0
-;CHECK-NEXT: .space 4
-;CHECK-NEXT: .align 3
+;CHECK32-NEXT: .vbyte 4, 1073741824
+;CHECK32-NEXT: .vbyte 4, 50
+;CHECK64-NEXT: .vbyte 8, 4611686018427387954
+;CHECK-NEXT: .vbyte 4, 0 # 0x0
+;CHECK-NEXT: .space 4
+;CHECK32-NEXT: .vbyte 4, 0
+;CHECK32-NEXT: .vbyte 4, 0
+;CHECK64-NEXT: .vbyte 8, 0
+;CHECK-NEXT: .vbyte 4, 0 # 0x0
+;CHECK-NEXT: .space 4
+
+;CHECK-NEXT: .align 3
;CHECK-NEXT: .L__const.main.cnst16:
-;CHECK-NEXT: .llong 4611686018427387926
-;CHECK-NEXT: .long 0 # 0x0
-;CHECK-NEXT: .space 4
+;CHECK32-NEXT: .vbyte 4, 1073741824
+;CHECK32-NEXT: .vbyte 4, 22
+;CHECK64-NEXT: .vbyte 8, 4611686018427387926
+;CHECK-NEXT: .vbyte 4, 0 # 0x0
+;CHECK-NEXT: .space 4
+
;CHECK-NEXT: .align 3
;CHECK-NEXT: .L__const.main.cnst8:
-;CHECK-NEXT: .long 1073741832 # 0x40000008
-;CHECK-NEXT: .long 0 # 0x0
+;CHECK-NEXT: .vbyte 4, 1073741832 # 0x40000008
+;CHECK-NEXT: .vbyte 4, 0 # 0x0
+
;CHECK-NEXT: .align 3
;CHECK-NEXT: .L__const.main.cnst4:
-;CHECK-NEXT: .short 16392 # 0x4008
+;CHECK-NEXT: .vbyte 2, 16392 # 0x4008
;CHECK-NEXT: .byte 0 # 0x0
;CHECK-NEXT: .space 1
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
index d6cb1b5a667f..80b695875b49 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
@@ -28,17 +28,17 @@ entry:
; CHECK: .csect .rodata.str2.2[RO],2
; CHECK-NEXT: .align 1
; CHECK-NEXT: .Lmagic16:
-; CHECK-NEXT: .short 264 # 0x108
-; CHECK-NEXT: .short 272 # 0x110
-; CHECK-NEXT: .short 213 # 0xd5
-; CHECK-NEXT: .short 0 # 0x0
+; CHECK-NEXT: .vbyte 2, 264 # 0x108
+; CHECK-NEXT: .vbyte 2, 272 # 0x110
+; CHECK-NEXT: .vbyte 2, 213 # 0xd5
+; CHECK-NEXT: .vbyte 2, 0 # 0x0
; CHECK-NEXT: .csect .rodata.str4.4[RO],2
; CHECK-NEXT: .align 2
; CHECK-NEXT: .Lmagic32:
-; CHECK-NEXT: .long 464 # 0x1d0
-; CHECK-NEXT: .long 472 # 0x1d8
-; CHECK-NEXT: .long 413 # 0x19d
-; CHECK-NEXT: .long 0 # 0x0
+; CHECK-NEXT: .vbyte 4, 464 # 0x1d0
+; CHECK-NEXT: .vbyte 4, 472 # 0x1d8
+; CHECK-NEXT: .vbyte 4, 413 # 0x19d
+; CHECK-NEXT: .vbyte 4, 0 # 0x0
; CHECK-NEXT: .csect .rodata.str1.1[RO],2
; CHECK-NEXT: .LstrA:
; CHECK-NEXT: .byte 104
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
index 0328531684a9..dddbe2ba089e 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefixes=CHECK,CHECK32 %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck --check-prefixes=CHECK,CHECK64 %s
; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers --file-header %t.o | \
@@ -24,27 +24,33 @@
; CHECK-NEXT: .globl const_ivar
; CHECK-NEXT: .align 2
; CHECK-NEXT: const_ivar:
-; CHECK-NEXT: .long 35
+; CHECK-NEXT: .vbyte 4, 35
; CHECK-NEXT: .globl const_llvar
; CHECK-NEXT: .align 3
; CHECK-NEXT: const_llvar:
-; CHECK-NEXT: .llong 36
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK32-NEXT: .vbyte 4, 36
+; CHECK64-NEXT: .vbyte 8, 36
; CHECK-NEXT: .globl const_svar
; CHECK-NEXT: .align 1
; CHECK-NEXT: const_svar:
-; CHECK-NEXT: .short 37
+; CHECK-NEXT: .vbyte 2, 37
; CHECK-NEXT: .globl const_fvar
; CHECK-NEXT: .align 2
; CHECK-NEXT: const_fvar:
-; CHECK-NEXT: .long 0x44480000
+; CHECK-NEXT: .vbyte 4, 0x44480000
; CHECK-NEXT: .globl const_dvar
; CHECK-NEXT: .align 3
; CHECK-NEXT: const_dvar:
-; CHECK-NEXT: .llong 0x408c200000000000
+; CHECK32-NEXT: .vbyte 4, 1082925056
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x408c200000000000
; CHECK-NEXT: .globl const_over_aligned
; CHECK-NEXT: .align 5
; CHECK-NEXT: const_over_aligned:
-; CHECK-NEXT: .llong 0x408c200000000000
+; CHECK32-NEXT: .vbyte 4, 1082925056
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x408c200000000000
; CHECK-NEXT: .globl const_chrarray
; CHECK-NEXT: const_chrarray:
; CHECK-NEXT: .byte 97
@@ -54,10 +60,18 @@
; CHECK-NEXT: .globl const_dblarr
; CHECK-NEXT: .align 3
; CHECK-NEXT: const_dblarr:
-; CHECK-NEXT: .llong 0x3ff0000000000000
-; CHECK-NEXT: .llong 0x4000000000000000
-; CHECK-NEXT: .llong 0x4008000000000000
-; CHECK-NEXT: .llong 0x4010000000000000
+; CHECK32-NEXT: .vbyte 4, 1072693248
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x3ff0000000000000
+; CHECK32-NEXT: .vbyte 4, 1073741824
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x4000000000000000
+; CHECK32-NEXT: .vbyte 4, 1074266112
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x4008000000000000
+; CHECK32-NEXT: .vbyte 4, 1074790400
+; CHECK32-NEXT: .vbyte 4, 0
+; CHECK64-NEXT: .vbyte 8, 0x4010000000000000
; OBJ: File: {{.*}}aix-xcoff-rodata.ll.tmp.o
diff --git a/llvm/test/CodeGen/PowerPC/test_func_desc.ll b/llvm/test/CodeGen/PowerPC/test_func_desc.ll
index bd6e94403cbe..500be4b63d2d 100644
--- a/llvm/test/CodeGen/PowerPC/test_func_desc.ll
+++ b/llvm/test/CodeGen/PowerPC/test_func_desc.ll
@@ -30,26 +30,26 @@ entry:
; CHECK: .globl foo[DS]
; CHECK: .globl .foo
; 32BIT: .csect foo[DS],2
-; 32BIT-NEXT: .long .foo
-; 32BIT-NEXT: .long TOC[TC0]
-; 32BIT-NEXT: .long 0
+; 32BIT-NEXT: .vbyte 4, .foo
+; 32BIT-NEXT: .vbyte 4, TOC[TC0]
+; 32BIT-NEXT: .vbyte 4, 0
; 64BIT: .csect foo[DS],3
-; 64BIT-NEXT: .llong .foo
-; 64BIT-NEXT: .llong TOC[TC0]
-; 64BIT-NEXT: .llong 0
+; 64BIT-NEXT: .vbyte 8, .foo
+; 64BIT-NEXT: .vbyte 8, TOC[TC0]
+; 64BIT-NEXT: .vbyte 8, 0
; CHECK-NEXT: .csect .text[PR],2
; CHECK-LABEL: .foo:
; CHECK: .globl main[DS]
; CHECK: .globl .main
; 32BIT: .csect main[DS],2
-; 32BIT-NEXT: .long .main
-; 32BIT-NEXT: .long TOC[TC0]
-; 32BIT-NEXT: .long 0
+; 32BIT-NEXT: .vbyte 4, .main
+; 32BIT-NEXT: .vbyte 4, TOC[TC0]
+; 32BIT-NEXT: .vbyte 4, 0
; 64BIT: .csect main[DS],3
-; 64BIT-NEXT: .llong .main
-; 64BIT-NEXT: .llong TOC[TC0]
-; 64BIT-NEXT: .llong 0
+; 64BIT-NEXT: .vbyte 8, .main
+; 64BIT-NEXT: .vbyte 8, TOC[TC0]
+; 64BIT-NEXT: .vbyte 8, 0
; CHECK-NEXT: .csect .text[PR],2
; CHECK-LABEL: .main:
; CHECK: bl .foo
@@ -58,13 +58,13 @@ entry:
; CHECK: .lglobl .static_foo
; 32BIT: .csect static_foo[DS],2
-; 32BIT-NEXT: .long .static_foo
-; 32BIT-NEXT: .long TOC[TC0]
-; 32BIT-NEXT: .long 0
+; 32BIT-NEXT: .vbyte 4, .static_foo
+; 32BIT-NEXT: .vbyte 4, TOC[TC0]
+; 32BIT-NEXT: .vbyte 4, 0
; 64BIT: .csect static_foo[DS],3
-; 64BIT-NEXT: .llong .static_foo
-; 64BIT-NEXT: .llong TOC[TC0]
-; 64BIT-NEXT: .llong 0
+; 64BIT-NEXT: .vbyte 8, .static_foo
+; 64BIT-NEXT: .vbyte 8, TOC[TC0]
+; 64BIT-NEXT: .vbyte 8, 0
; CHECK-NEXT: .csect .text[PR],2
; CHECK-LABEL: .static_foo:
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