[PATCH] D81088: [VPlan] Reject loops without computable backedge taken counts

[Florian Hahn via Phabricator via llvm-commits]

fhahn created this revision.
fhahn added reviewers: Ayal, gilr, rengolin, sguggill.
Herald added subscribers: vkmr, psnobl, rogfer01, rkruppe, bollu, hiraditya.
Herald added a project: LLVM.

getOrCreateTripCount is used to generate code for the outer loop, but it
requires a computable backedge taken counts. Check that in the VPlan
native path.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D81088

Files:
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll


Index: llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
@@ -0,0 +1,47 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -loop-vectorize -enable-vplan-native-path -S %s | FileCheck %s
+
+declare i1 @cond()
+
+; Make sure we do not vectorize (or crash) on outer loops with uncomputable
+; trip-counts.
+
+define void @test() {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[FOR1_HEADER:%.*]]
+; CHECK:       for1.header:
+; CHECK-NEXT:    br label [[FOR2_HEADER:%.*]]
+; CHECK:       for2.header:
+; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR1_HEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR2_HEADER]] ]
+; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
+; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 0
+; CHECK-NEXT:    br i1 [[EXITCOND]], label [[FOR1_LATCH:%.*]], label [[FOR2_HEADER]]
+; CHECK:       for1.latch:
+; CHECK-NEXT:    [[C:%.*]] = call i1 @cond()
+; CHECK-NEXT:    br i1 [[C]], label [[EXIT:%.*]], label [[FOR1_HEADER]], !llvm.loop !0
+; CHECK:       exit:
+; CHECK-NEXT:    ret void
+;
+entry:
+  br label %for1.header
+
+for1.header:                                  ; preds = %for.cond.cleanup3, %for.cond1.preheader.lr.ph
+  br label %for2.header
+
+for2.header:                                       ; preds = %for.body10, %for.body10.preheader
+  %indvars.iv = phi i64 [ 0, %for1.header ], [ %indvars.iv.next, %for2.header ]
+  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
+  %exitcond = icmp eq i64 %indvars.iv.next, 0
+  br i1 %exitcond, label %for1.latch, label %for2.header
+
+for1.latch:                                ; preds = %for.cond.cleanup9
+  %c = call i1 @cond()
+  br i1 %c, label %exit, label %for1.header, !llvm.loop !0
+
+exit:                                 ; preds = %for.cond.cleanup3, %entry
+  ret void
+}
+
+!0 = distinct !{!0, !1}
+!1 = !{!"llvm.loop.vectorize.enable", i1 true}
Index: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
===================================================================
--- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -7646,6 +7646,10 @@
     OptimizationRemarkEmitter *ORE, BlockFrequencyInfo *BFI,
     ProfileSummaryInfo *PSI, LoopVectorizeHints &Hints) {
 
+  if (PSE.getBackedgeTakenCount() == PSE.getSE()->getCouldNotCompute()) {
+    LLVM_DEBUG(dbgs() << "LV: cannot compute the outer-loop trip count\n");
+    return false;
+  }
   assert(EnableVPlanNativePath && "VPlan-native path is disabled.");
   Function *F = L->getHeader()->getParent();
   InterleavedAccessInfo IAI(PSE, L, DT, LI, LVL->getLAI());


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