[PATCH] D81076: [PowerPC] Custom lower rotl v1i128 to vector_shuffle.

[EsmeYi via Phabricator via llvm-commits]

Esme created this revision.
Esme added reviewers: steven.zhang, jsji, nemanjai, PowerPC.
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A bug is reported by bug-45628, where the swap_with_shift case can't be matched to a single HW instruction xxswapd as expected. Tests at master have been added in this NFC patch <https://reviews.llvm.org/D81073>.
We have MatchRotate to handle an 'or' of two operands and generate a rot[lr] if the case matches the idiom of rotate. While PPC doesn't support ROTL v1i128. We can custom lower ROTL v1i128 to the vector_shuffle. The vector_shuffle will be matched to a single HW instruction during the phase of instruction selection.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D81076

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/test/CodeGen/PowerPC/pr45628.ll

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