[PATCH] D81067: Fix dynamic probing scheme
serge via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 3 02:10:25 PDT 2020
serge-sans-paille created this revision.
serge-sans-paille added reviewers: craig.topper, jonpa.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
If we probe *after* each static stack allocation, we need to probe *before* each
dynamic stack allocation. Provide a scheme to describe the possible scenario.
Thanks a lot to @jonpa for motivating this fix.
https://reviews.llvm.org/D81067
Files:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
Index: llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
===================================================================
--- llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
+++ llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
@@ -26,8 +26,8 @@
; CHECK-X86-64-NEXT: cmpq %rax, %rsp
; CHECK-X86-64-NEXT: jl .LBB0_3
; CHECK-X86-64-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
-; CHECK-X86-64-NEXT: subq $4096, %rsp # imm = 0x1000
; CHECK-X86-64-NEXT: movq $0, (%rsp)
+; CHECK-X86-64-NEXT: subq $4096, %rsp # imm = 0x1000
; CHECK-X86-64-NEXT: cmpq %rax, %rsp
; CHECK-X86-64-NEXT: jge .LBB0_2
; CHECK-X86-64-NEXT: .LBB0_3:
@@ -56,8 +56,8 @@
; CHECK-X86-32-NEXT: cmpl %eax, %esp
; CHECK-X86-32-NEXT: jl .LBB0_3
; CHECK-X86-32-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
-; CHECK-X86-32-NEXT: subl $4096, %esp # imm = 0x1000
; CHECK-X86-32-NEXT: movl $0, (%esp)
+; CHECK-X86-32-NEXT: subl $4096, %esp # imm = 0x1000
; CHECK-X86-32-NEXT: cmpl %eax, %esp
; CHECK-X86-32-NEXT: jge .LBB0_2
; CHECK-X86-32-NEXT: .LBB0_3:
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -31650,17 +31650,28 @@
testMBB->addSuccessor(blockMBB);
testMBB->addSuccessor(tailMBB);
- // allocate a block and touch it
+ // Touch the block then extend it. This is done on the opposite side of
+ // static probe where we allocate then touch, to avoid the need of probing the
+ // tail of the static alloca. Possible scenarios are:
+ //
+ // + ---- <- ------------ <- ------------- <- ------------ +
+ // | |
+ // [free probe] -> [page alloc] -> [alloc probe] -> [tail alloc] + -> [dyn probe] -> [page alloc] -> [dyn probe] -> [tail alloc] +
+ // | |
+ // + <- ----------- <- ------------ <- ----------- <- ------------ +
+ //
+ // The property we want to enforce is to never have more than [page alloc] between two probes.
+
+ const unsigned MovMIOpc =
+ TFI.Uses64BitFramePtr ? X86::MOV64mi32 : X86::MOV32mi;
+ addRegOffset(BuildMI(blockMBB, DL, TII->get(MovMIOpc)), physSPReg, false, 0)
+ .addImm(0);
BuildMI(blockMBB, DL,
TII->get(getSUBriOpcode(TFI.Uses64BitFramePtr, ProbeSize)), physSPReg)
.addReg(physSPReg)
.addImm(ProbeSize);
- const unsigned MovMIOpc =
- TFI.Uses64BitFramePtr ? X86::MOV64mi32 : X86::MOV32mi;
- addRegOffset(BuildMI(blockMBB, DL, TII->get(MovMIOpc)), physSPReg, false, 0)
- .addImm(0);
BuildMI(blockMBB, DL, TII->get(X86::JMP_1)).addMBB(testMBB);
blockMBB->addSuccessor(testMBB);
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