[llvm] 587af86 - [X86] Add a flag to guard the wide load
Guozhi Wei via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 2 16:17:00 PDT 2020
Author: Guozhi Wei
Date: 2020-06-02T16:16:13-07:00
New Revision: 587af86f1d8adc77b229ed27b2f553e99f9710cd
URL: https://github.com/llvm/llvm-project/commit/587af86f1d8adc77b229ed27b2f553e99f9710cd
DIFF: https://github.com/llvm/llvm-project/commit/587af86f1d8adc77b229ed27b2f553e99f9710cd.diff
LOG: [X86] Add a flag to guard the wide load
As shown in http://lists.llvm.org/pipermail/llvm-dev/2020-May/141854.html,
widen load can also cause stall. Add a flag to guard the widening code,
so users can disable it and evaluate its performance impact.
Differential Revision: https://reviews.llvm.org/D80943
Added:
llvm/test/CodeGen/X86/no-wide-load.ll
Modified:
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86InstrInfo.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 5354b0c72fe3..2171be293914 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -40,6 +40,10 @@ static cl::opt<bool> AndImmShrink("x86-and-imm-shrink", cl::init(true),
cl::desc("Enable setting constant bits to reduce size of mask immediates"),
cl::Hidden);
+static cl::opt<bool> EnablePromoteAnyextLoad(
+ "x86-promote-anyext-load", cl::init(true),
+ cl::desc("Enable promoting aligned anyext load to wider load"), cl::Hidden);
+
//===----------------------------------------------------------------------===//
// Pattern Matcher Implementation
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 7b5bfea06474..8179afe88201 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -1122,7 +1122,7 @@ def loadi16 : PatFrag<(ops node:$ptr), (i16 (unindexedload node:$ptr)), [{
ISD::LoadExtType ExtType = LD->getExtensionType();
if (ExtType == ISD::NON_EXTLOAD)
return true;
- if (ExtType == ISD::EXTLOAD)
+ if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
return LD->getAlignment() >= 2 && LD->isSimple();
return false;
}]>;
@@ -1132,7 +1132,7 @@ def loadi32 : PatFrag<(ops node:$ptr), (i32 (unindexedload node:$ptr)), [{
ISD::LoadExtType ExtType = LD->getExtensionType();
if (ExtType == ISD::NON_EXTLOAD)
return true;
- if (ExtType == ISD::EXTLOAD)
+ if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
return LD->getAlignment() >= 4 && LD->isSimple();
return false;
}]>;
diff --git a/llvm/test/CodeGen/X86/no-wide-load.ll b/llvm/test/CodeGen/X86/no-wide-load.ll
new file mode 100644
index 000000000000..b91e993acc3e
--- /dev/null
+++ b/llvm/test/CodeGen/X86/no-wide-load.ll
@@ -0,0 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -x86-promote-anyext-load=false | FileCheck %s
+
+%struct.S = type { i32, i16, i16 }
+
+define void @foo(%struct.S* %p, i16 signext %s) {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: movzwl 4(%rdi), %eax
+; CHECK-NEXT: andl $-1121, %eax # imm = 0xFB9F
+; CHECK-NEXT: orl $1024, %eax # imm = 0x400
+; CHECK-NEXT: movw %ax, 4(%rdi)
+; CHECK-NEXT: retq
+entry:
+ %f2 = getelementptr inbounds %struct.S, %struct.S* %p, i64 0, i32 1
+ %0 = load i16, i16* %f2, align 4
+ %1 = and i16 %0, -1121
+ %2 = or i16 %1, 1024
+ store i16 %2, i16* %f2, align 4
+ ret void
+}
+
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