[PATCH] D81007: AMDGPU: Don't run indexing mode switches with exec = 0

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 2 07:41:39 PDT 2020


arsenm created this revision.
arsenm added reviewers: cdevadas, rampitec, nhaehnle, kerbowa.
Herald added subscribers: arphaman, hiraditya, t-tye, tpr, dstuttard, yaxunl, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
arsenm added a parent revision: D80998: AMDGPU: Don't run mode switches with exec 0.

Add mode defs rather than special casing this like some of the other
instructions.


https://reviews.llvm.org/D81007

Files:
  llvm/lib/Target/AMDGPU/SOPInstructions.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
  llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
  llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
  llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-gpr-idx-mode.mir
  llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir

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