[PATCH] D80390: [mips] Support 64-bit relative relocations

Simon Atanasyan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 2 02:12:58 PDT 2020


This revision was automatically updated to reflect the committed changes.
Closed by commit rGb00f0d4238cb: [mips] Support 64-bit relative relocations (authored by atanasyan).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80390/new/

https://reviews.llvm.org/D80390

Files:
  lld/test/ELF/mips-pc64.s
  llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
  llvm/test/MC/Mips/relocation-n64.s
  llvm/test/MC/Mips/unsupported-relocation.s


Index: llvm/test/MC/Mips/unsupported-relocation.s
===================================================================
--- llvm/test/MC/Mips/unsupported-relocation.s
+++ llvm/test/MC/Mips/unsupported-relocation.s
@@ -11,5 +11,3 @@
 # CHECK: :[[@LINE-1]]:17: error: MIPS does not support one byte relocations
         .byte   x+1
 # CHECK: :[[@LINE-1]]:17: error: MIPS does not support one byte relocations
-        .quad   x-foo
-# CHECK: :[[@LINE-1]]:17: error: MIPS does not support 64-bit PC-relative relocations
Index: llvm/test/MC/Mips/relocation-n64.s
===================================================================
--- llvm/test/MC/Mips/relocation-n64.s
+++ llvm/test/MC/Mips/relocation-n64.s
@@ -70,4 +70,6 @@
         .word 0
 bar:
         .word 1
+        .option pic2
+        .quad foo+0x1fffffff0-.               // RELOC: R_MIPS_PC32/R_MIPS_64/R_MIPS_NONE foo 0x1FFFFFFF0
 // DATA-LABEL: Section {
Index: llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
===================================================================
--- llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
+++ llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
@@ -234,14 +234,15 @@
   case Mips::fixup_Mips_32:
   case FK_Data_4:
     return IsPCRel ? ELF::R_MIPS_PC32 : ELF::R_MIPS_32;
+  case Mips::fixup_Mips_64:
+  case FK_Data_8:
+    return IsPCRel
+               ? setRTypes(ELF::R_MIPS_PC32, ELF::R_MIPS_64, ELF::R_MIPS_NONE)
+               : ELF::R_MIPS_64;
   }
 
   if (IsPCRel) {
     switch (Kind) {
-    case FK_Data_8:
-      Ctx.reportError(Fixup.getLoc(),
-                      "MIPS does not support 64-bit PC-relative relocations");
-      return ELF::R_MIPS_NONE;
     case Mips::fixup_Mips_Branch_PCRel:
     case Mips::fixup_Mips_PC16:
       return ELF::R_MIPS_PC16;
@@ -277,9 +278,6 @@
   }
 
   switch (Kind) {
-  case Mips::fixup_Mips_64:
-  case FK_Data_8:
-    return ELF::R_MIPS_64;
   case FK_DTPRel_4:
     return ELF::R_MIPS_TLS_DTPREL32;
   case FK_DTPRel_8:
Index: lld/test/ELF/mips-pc64.s
===================================================================
--- /dev/null
+++ lld/test/ELF/mips-pc64.s
@@ -0,0 +1,24 @@
+# REQUIRES: mips
+
+# Check handling of 64-bit pc-realtive relocation.
+
+# RUN: llvm-mc -filetype=obj -triple=mips64-unknown-linux %s -o %t.o
+# RUN: echo 'SECTIONS { \
+# RUN:         .text 0x10000 : { *(.text) } \
+# RUN:         .data 0x30000 : { *(.data) } \
+# RUN:       }' > %t.script
+# RUN: ld.lld -shared %t.o -T %t.script -o %t
+# RUN: llvm-readelf -x .data %t | FileCheck %s
+
+# CHECK:      Hex dump of section '.data':
+# CHECK-NEXT:  0x00030000 ffffffff fffffff0 00000001 fffdffe8
+
+  .option pic2
+  .text
+foo:
+  nop
+  .data
+v0:
+  .quad foo+0x1fff0-.
+v1:
+  .quad foo+0x1fffffff0-.


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