[PATCH] D80260: [WIP][SVE] Prototype for general merging MOVPRFX support.

[Cameron McInally via Phabricator via llvm-commits]

cameron.mcinally added a comment.

In D80260#2058560 <https://reviews.llvm.org/D80260#2058560>, @sdesmalen wrote:

> > I definitely see the desired flexibility of having a lowering pass pre-regalloc. If you think that's the better solution, I'll work on it. I just don't have a strong opinions on where in the pipeline that pass should live.
>
> I'm a bit confused by what you mean with 'pre-regalloc lowering pass'? (Do you mean something like the ConditionalEarlyClobber pass mentioned in D80410 <https://reviews.llvm.org/D80410>?)


I'm probably the one confused. :D

We definitely need an extra register available in some of the MOVPRFX cases. Scavenging that reg probably isn't a good fix. So I was thinking it would be easier to generate the MOVPRFX when we're still at the virtual register phase. It's not clear to me how to make this work though, so I might be way off.

@paulwalker-arm mentioned something at last week's Sync-up meeting about generating the MOVPRFX directly during DAGCombine or similar. That sounds promising, but I'm not sure if I see that path clearly yet.


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