[PATCH] D80934: [AIX] Update data directives for AIX assembly
Xiangling Liao via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 1 14:05:43 PDT 2020
Xiangling_L added inline comments.
================
Comment at: llvm/lib/MC/MCAsmInfoXCOFF.cpp:33
+ // The standard AIX assembly directives auto-align, so they are not usable.
+ Data16bitsDirective = "\t.vbyte\t2, ";
+ Data32bitsDirective = "\t.vbyte\t4, ";
----------------
Just a question here.
I checked the XL behavior, in the following case:
```
struct {
int i;
double n;
} a[] = {
{9, 1.5},
};
```
test.s:
```
.csect a{RW}, 3
.long 0x00000009 # "\0\0\0\t"
.long 0x3ff80000 # "?\370\0\0"
.long 0x00000000 # "\0\0\0\0"
```
Under 32-bit mode, XL split a double to two `.long`. So I am wondering can we do the same in LLVM?
================
Comment at: llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll:29
+%struct.anon = type <{ i32, double }>
+ at astruct = global [1 x %struct.anon] [%struct.anon <{ i32 1, double 7.000000e+00 }>], align 1
+
----------------
I am wondering do you make it align to 1 due to any special reason? If not, according to AIX power alignment rule, this struct is supposed to be aligned to 4.
And also, we may want to add a more interesting case where the double is the first member of the struct, which is 8-byte aligned.
e.g.
```
%struct.anon = type <{ double, i32 }>
@astruct = global [1 x %struct.anon] [%struct.anon <{ double 7.000000e+00 , i32 1}>], align 8
```
By doing that, we can see how the padding is added using `vbyte`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D80934/new/
https://reviews.llvm.org/D80934
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