[PATCH] D80191: MIR Statepoint refactoring: pass GC pointers in VRegs. Part 1/5.

Denis Antrushin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 1 09:39:29 PDT 2020


dantrushin updated this revision to Diff 267647.
dantrushin added a comment.

Rework patch accodring to comments: Replace existing MachineSDNode with
newly introduced StatepointSDNode and use it for statepoint lowering.
No functional changes.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80191/new/

https://reviews.llvm.org/D80191

Files:
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp

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