[llvm] 8857822 - [X86] Move MMX_SET0 pattern into the instruction definition. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sat May 30 20:04:26 PDT 2020
Author: Craig Topper
Date: 2020-05-30T19:47:07-07:00
New Revision: 8857822452c758805e8bb33ecc877d8d0cce1660
URL: https://github.com/llvm/llvm-project/commit/8857822452c758805e8bb33ecc877d8d0cce1660
DIFF: https://github.com/llvm/llvm-project/commit/8857822452c758805e8bb33ecc877d8d0cce1660.diff
LOG: [X86] Move MMX_SET0 pattern into the instruction definition. NFC
Added:
Modified:
llvm/lib/Target/X86/X86InstrMMX.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td
index 83eddaa05f4a..415e0389145a 100644
--- a/llvm/lib/Target/X86/X86InstrMMX.td
+++ b/llvm/lib/Target/X86/X86InstrMMX.td
@@ -24,8 +24,9 @@
// We set canFoldAsLoad because this can be converted to a constant-pool
// load of an all-zeros value if folding it would be beneficial.
let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
- isPseudo = 1, SchedRW = [WriteZero] in {
-def MMX_SET0 : I<0, Pseudo, (outs VR64:$dst), (ins), "", []>;
+ isPseudo = 1, SchedRW = [WriteZero], Predicates = [HasMMX] in {
+def MMX_SET0 : I<0, Pseudo, (outs VR64:$dst), (ins), "",
+ [(set VR64:$dst, (x86mmx (MMX_X86movw2d (i32 0))))]>;
}
let Constraints = "$src1 = $dst" in {
@@ -172,11 +173,6 @@ def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i32mem:$src),
(x86mmx (MMX_X86movw2d (loadi32 addr:$src))))]>,
Sched<[WriteVecLoad]>;
-let Predicates = [HasMMX] in {
- def : Pat<(x86mmx (MMX_X86movw2d (i32 0))),
- (MMX_SET0)>;
-}
-
let mayStore = 1 in
def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (outs), (ins i32mem:$dst, VR64:$src),
"movd\t{$src, $dst|$dst, $src}", []>,
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