[PATCH] D80850: [llvm][SVE] IR intrinsics for quadword permutation instructions.

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli created this revision.
fpetrogalli added reviewers: sdesmalen, efriedma, kmclaughlin.
Herald added subscribers: llvm-commits, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a project: LLVM.

Adding intrinsics and codegen patterns for:

- trn1 <Zd>.q, <Zm>.q, <Zn>.q
- trn2 <Zd>.q, <Zm>.q, <Zn>.q
- zip1 <Zd>.q, <Zm>.q, <Zn>.q
- zip2 <Zd>.q, <Zm>.q, <Zn>.q
- uzp1 <Zd>.q, <Zm>.q, <Zn>.q
- uzp2 <Zd>.q, <Zm>.q, <Zn>.q

These instructions are defined in Armv8.6-A.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D80850

Files:
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select-matmul-fp64.ll

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