[PATCH] D79864: [PowerPC] Add new linker optimization for PowerPC

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

And now I somehow submitted before I was done writing my comment.  Trying again.

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Just looked at what I wrote, and the issue I'm seeing isn't clear.

The code doesn't require that the pld and the lwa are adjacent.  Therefore, it's possible that some instruction between the pld and the lwa writes to the destination register of the lwa.  If there is such an instruction, the linker optimization would cause a miscompile: the loaded value would be clobbered.


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  https://reviews.llvm.org/D79864/new/

https://reviews.llvm.org/D79864