[PATCH] D80738: [llvm][SVE] IR intrinsic for LD1RO.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11898
 
+static SDValue performLD1ROCombine(SDNode *N, SelectionDAG &DAG) {
+  SDLoc DL(N);
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fpetrogalli wrote:
> Note: I am tempted to merge `performLD1ROCombine` and `performLD1RQCombine` in a single function, as they only differ in the ISD node being used to replace the intrinsic. Let me know if this makes sense, I'll update the patch.
Yes, that makes sense.


Repository:
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  https://reviews.llvm.org/D80738/new/

https://reviews.llvm.org/D80738