[PATCH] D70072: [ARM] Improve codegen of volatile load/store of i64
Victor Campos via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 27 08:05:40 PDT 2020
vhscampos updated this revision to Diff 266545.
vhscampos added a comment.
Improve the testcase which exercises loads and stores from stack. Now, wrong frame index replacements will be caught here.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70072/new/
https://reviews.llvm.org/D70072
Files:
llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.h
llvm/lib/Target/ARM/ARMInstrInfo.td
llvm/lib/Target/ARM/ARMInstrThumb2.td
llvm/test/CodeGen/ARM/i64_volatile_load_store.ll
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