[PATCH] D76585: [PowerPC] Require NSZ flag for c-a*b to FNMSUB
Qing Shan Zhang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 27 03:12:15 PDT 2020
steven.zhang added a comment.
LGTM now overall with some minor comments. As you are adding the pattern for VNMSUBFP, I would suggest you do it in another patch.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:15818
+ const TargetOptions &Options = getTargetMachine().Options;
+ unsigned InvertedOpc = invertFMAOpcode(Opc);
+ SDValue N0 = Op.getOperand(0);
----------------
Remove the InvertedOpc but use FMA directly as we know that it is FNMSUB now. And move the invertFMAOpcode as lambda of the getNegatedExpression.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:15833
+
+ // Transformations may change sign of zeroes.
+ if (Flags.hasNoSignedZeros() || Options.NoSignedZerosFPMath) {
----------------
It will be great if you can add more wording on how it changes the sign of zeroes here.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D76585/new/
https://reviews.llvm.org/D76585
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