[llvm] f2fad3f - [GlobalISel][InlineAsm] Add missing EarlyClobber flag to inline asm output operands

[Konstantin Schwarz via llvm-commits]

Author: Konstantin Schwarz
Date: 2020-05-27T12:04:18+02:00
New Revision: f2fad3f703aa20cc7b452bdf1605cb46eb960653

URL: https://github.com/llvm/llvm-project/commit/f2fad3f703aa20cc7b452bdf1605cb46eb960653
DIFF: https://github.com/llvm/llvm-project/commit/f2fad3f703aa20cc7b452bdf1605cb46eb960653.diff

LOG: [GlobalISel][InlineAsm] Add missing EarlyClobber flag to inline asm output operands

Summary:
Previously, we only added early-clobber flags to the 'group' immediate flag operand
of an inline asm operand.
However, we also have to add the EarlyClobber flag to the MachineOperand itself.

This fixes PR46028

Reviewers: arsenm, leonardchan

Reviewed By: arsenm, leonardchan

Subscribers: phosek, wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80467

Added: 
    

Modified: 
    llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
index 363b4b59ec54..3ac52b8e3e73 100644
--- a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
@@ -379,7 +379,8 @@ bool InlineAsmLowering::lowerInlineAsm(
 
         for (Register Reg : OpInfo.Regs) {
           Inst.addReg(Reg,
-                      RegState::Define | getImplRegState(Reg.isPhysical()));
+                      RegState::Define | getImplRegState(Reg.isPhysical()) |
+                          (OpInfo.isEarlyClobber ? RegState::EarlyClobber : 0));
         }
 
         // Remember this output operand for later processing

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
index 18540f1b8313..f1be1011fa86 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
@@ -23,6 +23,22 @@ define void @asm_simple_register_clobber() {
   ret void
 }
 
+define i64 @asm_register_early_clobber() {
+  ; CHECK-LABEL: name: asm_register_early_clobber
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK:   INLINEASM &"mov $0, 7; mov $1, 7", 1 /* sideeffect attdialect */, 1441803 /* regdef-ec:GPR64common */, def early-clobber %0, 1441803 /* regdef-ec:GPR64common */, def early-clobber %1, !0
+  ; CHECK:   [[COPY:%[0-9]+]]:_(s64) = COPY %0
+  ; CHECK:   [[COPY1:%[0-9]+]]:_(s64) = COPY %1
+  ; CHECK:   [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
+  ; CHECK:   $x0 = COPY [[ADD]](s64)
+  ; CHECK:   RET_ReallyLR implicit $x0
+  call { i64, i64 } asm sideeffect "mov $0, 7; mov $1, 7", "=&r,=&r"(), !srcloc !0
+  %asmresult = extractvalue { i64, i64 } %1, 0
+  %asmresult1 = extractvalue { i64, i64 } %1, 1
+  %add = add i64 %asmresult, %asmresult1
+  ret i64 %add
+}
+
 define i32 @test_specific_register_output() nounwind ssp {
   ; CHECK-LABEL: name: test_specific_register_output
   ; CHECK: bb.1.entry: