[PATCH] D80457: AMDGPU/GlobalISel: Fixed handling of non-standard vectors

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 26 15:50:26 PDT 2020


rampitec marked an inline comment as done.
rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:555
 
+  // There can be a reminder if DstRC is wider than sources.
+  LaneBitmask Reminder = DstRC->getLaneMask() & ~Covered;
----------------
arsenm wrote:
> The selector shouldn't be trying to fix these up. The selector should only see directly selectable vector sizes. We can either widen the vector sources in the legalizer, or add the missing register classes. It's also not valid to use G_MERGE_VALUES on vectors. You have to use G_BUILD_VECTOR or G_CONCAT_VECTORS depending on whether the source is scalar or vector
In fact it does not seem to be needed at all. REG_SEQUENCE does it right even if incomplete.


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https://reviews.llvm.org/D80457





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