[PATCH] D80587: [AMDGPU] Bail alloca vectorization if GEP not found

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG512e806a33e8: [AMDGPU] Bail alloca vectorization if GEP not found (authored by rampitec).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80587/new/

https://reviews.llvm.org/D80587

Files:
  llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
  llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll


Index: llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
+++ llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
@@ -189,5 +189,23 @@
   ret void
 }
 
+; GCN-LABEL: {{^}}ptr_alloca_bitcast:
+; OPT-LABEL: define i64 @ptr_alloca_bitcast
+
+; GCN-NOT: buffer_
+; GCN: v_mov_b32_e32 v1, 0
+
+; OPT: %private_iptr = alloca <2 x i32>, align 8, addrspace(5)
+; OPT: %cast = bitcast <2 x i32> addrspace(5)* %private_iptr to i64 addrspace(5)*
+; OPT: %tmp1 = load i64, i64 addrspace(5)* %cast, align 8
+
+define i64 @ptr_alloca_bitcast() {
+entry:
+  %private_iptr = alloca <2 x i32>, align 8, addrspace(5)
+  %cast = bitcast <2 x i32> addrspace(5)* %private_iptr to i64 addrspace(5)*
+  %tmp1 = load i64, i64 addrspace(5)* %cast, align 8
+  ret i64 %tmp1
+}
+
 declare i32 @llvm.amdgcn.workitem.id.x()
 declare i32 @llvm.amdgcn.workitem.id.y()
Index: llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
@@ -339,7 +339,9 @@
 static Value *
 calculateVectorIndex(Value *Ptr,
                      const std::map<GetElementPtrInst *, Value *> &GEPIdx) {
-  GetElementPtrInst *GEP = cast<GetElementPtrInst>(stripBitcasts(Ptr));
+  GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(stripBitcasts(Ptr));
+  if (!GEP)
+    return nullptr;
 
   auto I = GEPIdx.find(GEP);
   return I == GEPIdx.end() ? nullptr : I->second;
@@ -496,10 +498,12 @@
       if (Inst->getType() == AllocaTy || Inst->getType()->isVectorTy())
         break;
 
-      Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS);
       Value *Ptr = cast<LoadInst>(Inst)->getPointerOperand();
       Value *Index = calculateVectorIndex(Ptr, GEPVectorIdx);
+      if (!Index)
+        break;
 
+      Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS);
       Value *BitCast = Builder.CreateBitCast(Alloca, VecPtrTy);
       Value *VecValue = Builder.CreateLoad(VectorTy, BitCast);
       Value *ExtractElement = Builder.CreateExtractElement(VecValue, Index);
@@ -515,9 +519,12 @@
           SI->getValueOperand()->getType()->isVectorTy())
         break;
 
-      Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS);
       Value *Ptr = SI->getPointerOperand();
       Value *Index = calculateVectorIndex(Ptr, GEPVectorIdx);
+      if (!Index)
+        break;
+
+      Type *VecPtrTy = VectorTy->getPointerTo(AMDGPUAS::PRIVATE_ADDRESS);
       Value *BitCast = Builder.CreateBitCast(Alloca, VecPtrTy);
       Value *VecValue = Builder.CreateLoad(VectorTy, BitCast);
       Value *Elt = SI->getValueOperand();


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