[PATCH] D80033: [AMDGPU] Fix wait counts in the presence of 16bit subregisters
Valery Pykhtin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 26 02:40:15 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rG92f3828dc567: [AMDGPU] Fix wait counts in the presence of 16bit subregisters (authored by vpykhtin).
Changed prior to commit:
https://reviews.llvm.org/D80033?vs=264336&id=266139#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D80033/new/
https://reviews.llvm.org/D80033
Files:
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
llvm/test/CodeGen/AMDGPU/waitcnt.mir
Index: llvm/test/CodeGen/AMDGPU/waitcnt.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/waitcnt.mir
+++ llvm/test/CodeGen/AMDGPU/waitcnt.mir
@@ -41,6 +41,9 @@
ret void
}
+ define amdgpu_kernel void @subregs16bit() {
+ ret void
+ }
...
---
@@ -284,3 +287,19 @@
FLAT_STORE_DWORD $vgpr1_vgpr2, $vgpr0, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
}
...
+
+---
+# CHECK-LABEL: name: subregs16bit
+# CHECK: S_WAITCNT 112
+# CHECK-NEXT: V_NOP_e32
+
+name: subregs16bit
+machineFunctionInfo:
+ isEntryFunction: true
+body: |
+ bb.0:
+ liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4
+ $vgpr0 = FLAT_LOAD_USHORT killed $vgpr0_vgpr1, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
+ $vgpr1 = FLAT_LOAD_USHORT killed $vgpr2_vgpr3, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
+ V_NOP_e32 implicit $exec, implicit $vgpr0_lo16, implicit $vgpr1_lo16
+...
Index: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -505,7 +505,7 @@
const TargetRegisterClass *RC = TII->getOpRegClass(*MI, OpNo);
unsigned Size = TRI->getRegSizeInBits(*RC);
- Result.second = Result.first + (Size / 32);
+ Result.second = Result.first + ((Size + 16) / 32);
return Result;
}
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