[PATCH] D80466: [X86] Improve i8 + 'slow' i16 funnel shift codegen

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:19087
+  // fshl(x,y,z) -> (((aext(x) << bw) | zext(y)) << (z & (bw-1))) >> bw.
+  // fshr(x,y,z) -> (((aext(x) << bw) | zext(y)) >> (z & (bw-1))) >> bw.
+  if ((VT == MVT::i8 || (ExpandFunnel && VT == MVT::i16)) &&
----------------
The final `>> bw` is wrong for fshr.


================
Comment at: llvm/test/CodeGen/X86/fshl.ll:22-23
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    shll $8, %eax
+; X86-NEXT:    orl %edx, %eax
+; X86-NEXT:    andb $7, %cl
----------------
Would it be worth trying to generate just `movb %al, %dh` instead of zext+shll+orl?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80466/new/

https://reviews.llvm.org/D80466