[llvm] 80cc43b - [AArch64] Set i32 ISD::MULHU/S to Expand instead of Legal.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-05-26T00:41:09-07:00
New Revision: 80cc43b420a8ab8648f44fbb554b483a2998712d

URL: https://github.com/llvm/llvm-project/commit/80cc43b420a8ab8648f44fbb554b483a2998712d
DIFF: https://github.com/llvm/llvm-project/commit/80cc43b420a8ab8648f44fbb554b483a2998712d.diff

LOG: [AArch64] Set i32 ISD::MULHU/S to Expand instead of Legal.

Looks like there are no isel patterns for these. A DAG combine
turns it into i64 multiply and a shift which hides this.

Extracted from D80485

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 856a2e4d9d67..5eb9b7463411 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -354,6 +354,10 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
     setOperationAction(ISD::ROTR, VT, Expand);
   }
 
+  // AArch64 doesn't have i32 MULH{S|U}.
+  setOperationAction(ISD::MULHU, MVT::i32, Expand);
+  setOperationAction(ISD::MULHS, MVT::i32, Expand);
+
   // AArch64 doesn't have {U|S}MUL_LOHI.
   setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
   setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);