[PATCH] D76585: [PowerPC] Require NSZ flag for c-a*b to FNMSUB

Qing Shan Zhang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun May 24 20:15:26 PDT 2020


steven.zhang added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:16242
+  // (fnmsub (fneg a) b c) => (fma a b c)
+  if (SDValue NegN0 = getCheaperNegatedExpression(N0, DAG, LegalOps, CodeSize))
+    return DAG.getNode(InvertOpCode(Opc), Loc, VT, NegN0, N1, N2, Flags);
----------------
qiucf wrote:
> steven.zhang wrote:
> > Can we move all these logic into getNegatedExpression so that more opportunity will be found?
> Removing main part of these logic into `getNegatedExpression` makes code cleaner. But `FNMSUB` nodes will never try negate unless we combine it?
ok. I think, we still need to combine it as FNMSUB as what you did now to reduce FNEG. But we miss to do the negation between FMA and FNMSUB. But it could be a follow up patch. 


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:16252
+  // (fnmsub a b (fneg c)) => (fneg (fma a b c))
+  if (SDValue NegN2 = getCheaperNegatedExpression(N2, DAG, LegalOps, CodeSize))
+    return DAG.getNode(
----------------
Do we need this transformation ? I didn't see the benefit of doing this as it didn't reduces the FNEG.


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  https://reviews.llvm.org/D76585/new/

https://reviews.llvm.org/D76585





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