[PATCH] D80500: [X86] Add pseudo instructions to use MULX with a single destination when the low result isn't used.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel, andreadb.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

The instruction is defined to only produce high result if both
destinations are the same. We can exploit this to avoid
unnecessarily clobbering a register.

In order to hide this from register allocation we use a pseudo
instruction and expand the result during MCInst creation.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D80500

Files:
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/lib/Target/X86/X86InstrArithmetic.td
  llvm/lib/Target/X86/X86MCInstLower.cpp
  llvm/test/CodeGen/X86/atomic-unordered.ll
  llvm/test/CodeGen/X86/i128-mul.ll
  llvm/test/CodeGen/X86/pr35636.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D80500.265953.patch
Type: text/x-patch
Size: 10682 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200525/459c5b18/attachment-0001.bin>